Cherry Trail itself is a fairly small chip. While Intel hasnt released an official die size for it (no more than they did Bay Trail), from various IDF presentations they have released official numbers for the complete package, and decent photos as well. As a result we can take a decent stab at die sizes, and from Intels photos wed estimate that the die size is around 83mm2. Unfortunately we dont have anything quite comparable to Bay Trail, though we believe it to be a good bit smaller than Intels previous generation tablet SoC. At 83mm2 this would put the die size at quite a bit smaller than Apples A8X tablet SoC, and actually is just a hair smaller than the A8 phone SoCs 89mm2.
Diving a bit deeper, Intel has also released some size data for individual Silvermont/Airmont CPU modules. The dual core modules, which contain the 2 CPU cores along with L2 cache and appropriate glue, have shrunk significantly from Silvermont to Airmont. Overall the Airmont CPU module is 64% smaller than the Silvermont module. And to be clear that does not mean Airmont is 64% of the size of Silvermont, that means that Airmont has been reduced by 64%; relative to Silvermont it is only 36% of the die size. Intel has achieved a better scaling factor than 22nm to 14nm alone, indicating that they have almost certainly enacted further optimizations to bring down the die size as an architectural level.