The Intel Atom Thread

[Abwx]

Huh no. You should look at how the score is computed

Integer score (that is without crypto) for a Q9550 is 480, vs 473 for J5005.
Q9550: https://browser.geekbench.com/v5/cpu/155946
J5005: https://browser.geekbench.com/v5/cpu/89276

But your J5005 has the AES instructions and they are used since it run at 1.39 GB/s while the J4105 is a little short of 1GB/s, Q9550 being at 0.13 GB/s.

So actually you brought even more AES in the overall result, but if that s how it should be computed then i have nothing to add...

 

[Nothingness]

But your J5005 has the AES instructions and they are used since it run at 1.39 GB/s while the J4105 is a little short of 1GB/s, Q9550 being at 0.13 GB/s.

So actually you brought even more AES in the overall result, but if that s how it should be computed then i have nothing to add...

Come on, the AES score accounts for 5% of the total score. And the integer score doesn't include crypto. So what more can I say? I showed that Gemini Lake is close to Core 2 in integer performance and you showed that it has AES HW.

PS - I invite you to explain your maths that show that a 10x better AES brings 42% improvement to the total score. I'm curious to see that.

 

[Abwx]

Come on, the AES score accounts for 5% of the total score. And the integer score doesn't include crypto. So what more can I say? I showed that Gemini Lake is close to Core 2 in integer performance and you showed that it has AES HW.

PS - I invite you to explain your maths that show that a 10x better AES brings 42% improvement to the total score. I'm curious to see that.

Say a bench that use 21 subscores and two CPUs that perform exactly the same in all subscores, so they score both 21 in the overall result, each unity being the weight of each sub bench.

As said the perf ratio between the two CPU is 21/21 = 1 since they perfom the same in all subscores.

If a subscore is increased by a ratio of 10 then the CPU total score will be 21+ 9 = 30 and it will score 30/21 = 1.428x better by the virtue of this inflated bench, there s a well known case in SPEC_int (libquantum) wich inflated hugely the overall score of Intel CPUs when using ICC to target this very sub bench.

 

[Thala]

Say a bench that use 21 subscores and two CPUs that perform exactly the same in all subscores, so they score both 21 in the overall result, each unity being the weight of each sub bench.

As said the perf ratio between the two CPU is 21/21 = 1 since they perfom the same in all subscores.

If a subscore is increased by a ratio of 10 then the CPU total score will be 21+ 9 = 30 and it will score 30/21 = 1.428x better by the virtue of this inflated bench, there s a well known case in SPEC_int (libquantum) wich inflated hugely the overall score of Intel CPUs when using ICC to target this very sub bench.

Small correction. Typically geometric mean is used when calculating a combined score. For you example this means the score will be 10^(1/22)=1.11 -> 11% better.

 

[AkulaMD]

It seems so: https://browser.geekbench.com/processor-benchmarks
J4105 at 417/1310
Q9550 at 424/1369

J5005 is at ~480/1500.

Hope the updated version would be even better. Especially with the 10nm manufacturing process.

 

[Nothingness]

Say a bench that use 21 subscores and two CPUs that perform exactly the same in all subscores, so they score both 21 in the overall result, each unity being the weight of each sub bench.

As said the perf ratio between the two CPU is 21/21 = 1 since they perfom the same in all subscores.

If a subscore is increased by a ratio of 10 then the CPU total score will be 21+ 9 = 30 and it will score 30/21 = 1.428x better by the virtue of this inflated bench, there s a well known case in SPEC_int (libquantum) wich inflated hugely the overall score of Intel CPUs when using ICC to target this very sub bench.

The problem is that it doesn't match the way Geekbench score is computed.

As I said the crypto score accounts for 5% of the total. So let's pick 100 for crypto at 5%, 100 for INT at 65%, 100 for FP at 30%. The combined score would be 100. If you multiply the crypto score by 10, you get 115 (still too much I agree).

If we pick the examples I gave: Q5500 is .05*59+.65*480+.30*458=452; now put the crypto score from J5005: .05*813+.65*480+.30*458=490, so about 8% higher. The impact is high but nowhere near your 42%.

 

[Nothingness]

Small correction. Typically geometric mean is used when calculating a combined score. For you example this means the score will be 10^(1/22)=1.11 -> 11% better.

Geekbench does a geometric mean of integer scores, a geomean of FP scores. Then things are combined as I previously wrote 5% crypto + 30% FP + 65% INT.

 

[Thala]

As I said the crypto score accounts for 5% of the total. So let's pick 100 for crypto at 5%, 100 for INT at 65%, 100 for FP at 30%. The combined score would be 100. If you multiply the crypto score by 10, you get 115 (still too much I agree).

Unless i understood something wrong: When i multiply crypto score in your example by 10 i am ending up with 50+65+30 = 145 ....pretty much what Abwx was claiming.
The problem however is arithmetic mean, as it has a bias towards larger contributing values. If the base scores without crypto acceleration were 100/100/100 a 10x increase of crypto would indead increase overall score by 45% (see above) . However if the base scores without cryto acceleration were say 10/100/100 a 10x increase of cryto would lead to 100/(95.5) = 1.05 -> 5% increase.

The above example should also give you an insight why arithmetic mean (or weighted average) should never be used.

 

[Abwx]

Small correction. Typically geometric mean is used when calculating a combined score. For you example this means the score will be 10^(1/22)=1.11 -> 11% better.

Agree that the actual weight is compressed by the used mean but still, that s a lot of improvement that is nowhere close to real IPC improvements (...), the 10x AES perf is for the J4105, it s 15x for the J5005 that Nothingness linked.

Intel s C2 relatively to current Atoms is somewhat comparable to AMD Phenom/Llano comparatively to Piledriver and its iterations, that an older 3 ALU design would be hardly beaten in ST perf/clock by a more modern uarch restricted to 2 ALUs if this latter doesnt use new and specific instructions.

 

[Nothingness]

Unless i understood something wrong: When i multiply crypto score in your example by 10 i am ending up with 50+65+30 = 145 ....pretty much what Abwx was claiming.
The problem however is arithmetic mean, as it has a bias towards larger contributing values. If the base scores without crypto acceleration were 100/100/100 a 10x increase of crypto would indead increase overall score by 45% (see above) . However if the base scores without cryto acceleration were say 10/100/100 a 10x increase of cryto would lead to 100/(95.5) = 1.05 -> 5% increase.

The above example should also give you an insight why arithmetic mean (or weighted average) should never be used.

I showed the computation just above, where the crypto score is 15x higher, you can check it

Theoretical values even when correct make little sense here. You have all the data to evaluate the impact of the crypto score. @Abwx made it sound as if that crypto score inflated the score I linked by 42%, which is not the case.

But I agree with what both you and Abwx wrote The impact of AES can be too large, and arithmetic mean should be used with care.

 

[ninaholic37]

Is the last 2W SDP Atom still going to be the Atom-x3/x5/x7 series from Cherry Trail? I see a lot of 10" netbooks and 2-in-1s still using it so they can have a fanless design.

Thomson Neo10 with Atom x5-z8350 - https://www.newegg.com/p/1TS-0084-00003
Acer Aspire One with Atom x5-8350 - https://www.amazon.ca/Acer-S1003-10L5-x5-Z8350-Touchscreen-Convertible/dp/B078BT3G9Q

I have both of these, the first seems a bit faster overall. As far as I understand, anything with higher SDP/TDP is called Celeron/Pentium so the "Atom" itself in laptops has been dead ever since Cherry Trail?

 

[Dayman1225]

Intel’s 10nm Snow Ridge Wields Tremont Atom Cores and Mesh Architecture

An Intel-provided reference manual for Snow Ridge reveals the forthcoming 10nm networking SoC for 5G base stations is based on the Atom architecture. It also has a mesh.

www.tomshardware.com

Intels Basestation chip codenamed SnowRidge appears to be using Tremont Atom cores with the Mesh Architecture seen in Skylake X/SP, Cascade Lake X/SP and Xeon Phi.

 

[Roland00Address]

Is the last 2W SDP Atom still going to be the Atom-x3/x5/x7 series from Cherry Trail? I see a lot of 10" netbooks and 2-in-1s still using it so they can have a fanless design.

Thomson Neo10 with Atom x5-z8350 - https://www.newegg.com/p/1TS-0084-00003
Acer Aspire One with Atom x5-8350 - https://www.amazon.ca/Acer-S1003-10L5-x5-Z8350-Touchscreen-Convertible/dp/B078BT3G9Q

I have both of these, the first seems a bit faster overall. As far as I understand, anything with higher SDP/TDP is called Celeron/Pentium so the "Atom" itself in laptops has been dead ever since Cherry Trail?

It isn't released yet, but Intel Lakefield is supposedly shipping to OEMs sometime in 2019 and thus 3 to 6 months later we may get devices. It will be 5w to 7w tdp so fanless is possible.
It will use 1x Sunny Cove big core (aka newest form of Core-M tech) and 4x Tremont small cores (aka newest form of Intel Atom.)

Who knows about pricing, but it seems Intel is no longer caring about $200 sub pricing for they are foundry constrained where they want to produce even more chips but their foundries can't deliver. Lakefield is a 3D POP chip with a mixture of 10nm and 22nm (10nm for the CPUs, 22nm for the I/O and other Southbridge.) The total package is 12mm by 12mm (and the SOC itself will be much smaller) for comparison a core Y chip is 26.5 mm by 18.5 mm.

 

[moinmoin]

Is the last 2W SDP Atom still going to be the Atom-x3/x5/x7 series from Cherry Trail? I see a lot of 10" netbooks and 2-in-1s still using it so they can have a fanless design.

Thomson Neo10 with Atom x5-z8350 - https://www.newegg.com/p/1TS-0084-00003
Acer Aspire One with Atom x5-8350 - https://www.amazon.ca/Acer-S1003-10L5-x5-Z8350-Touchscreen-Convertible/dp/B078BT3G9Q

I have both of these, the first seems a bit faster overall. As far as I understand, anything with higher SDP/TDP is called Celeron/Pentium so the "Atom" itself in laptops has been dead ever since Cherry Trail?

I got a netbook with N3700 "Pentium" with 4W SDP which is also fanless and no aggressive throttling that I'm aware of. I think it's just the "cheap" Atom branding that Intel doesn't want to be used anymore.

 

[Roland00Address]

I think it's just the "cheap" Atom branding that Intel doesn't want to be used anymore.

The brand was always poison, it was just Intel Hubris who thought naming the brand the way they did was smart. And consumer expectation of Atom was crafted by the millions of units sold creating impressions in the customer poisoning future use of the brand.

I got a netbook with N3700 "Pentium" with 4W SDP which is also fanless and no aggressive throttling that I'm aware of.

But it makes no sense to have a 2w TDP chip in a tablet. 4w is a much better design threshold for 2w vs 4w does not reduce cost in tablets.

Other things are more important such as the coast of the motherboard and its size. Battery life (which is more tied to not to the max TDP but instead its minimum power draw.) Yadda, Yadda, Yadda.

2w TDP was only chosen for Intel still had hopes into getting into phones. Those hopes were killed 5 years ago and were already mostly dashed 7 to 8 years ago.

 

[DrMrLordX]

Intels Basestation chip codenamed SnowRidge appears to be using Tremont Atom cores with the Mesh Architecture seen in Skylake X/SP, Cascade Lake X/SP and Xeon Phi.

I understand that mesh was first introduced for use with Atom cores in Phi, but still . . . that was a chip with a massive number of cores. Mesh on a hexcore? Why?

 

[NTMBK]

I understand that mesh was first introduced for use with Atom cores in Phi, but still . . . that was a chip with a massive number of cores. Mesh on a hexcore? Why?

In Phi, each mesh tile was two cores. So it probably means that SnowRidge has 12 cores.

 

[DrMrLordX]

In Phi, each mesh tile was two cores. So it probably means that SnowRidge has 12 cores.

Hmmm you could be right. They might have even updated the tile setup to include more cores.

 

[NostaSeronx]

Hmmm you could be right. They might have even updated the tile setup to include more cores.

Goldmont-normal => 1 MB per 2 cores
Goldmont-server => 2 MB per 2 cores
Goldmont plus-normal => 4 MB per 4 cores

So, ideally the tile core count would be four cores with faster L2(independent >512K L2 per core) and slow-ish--er L3(>4 MB shared between all four cores).

Denverton = 16 cores
Snow Ridge => 24 cores // makes it an upgrade

Denverton => The Intel Atom® C3000 processor supports this transformation, and Intel is working with communications equipment vendors to increase computing, bandwidth, and storage capacity at the edge—including 5G base stations with integrated server capabilities, virtualized customer premise equipment (vCPE), software-defined wide area network (SD-WAN), and network appliances.

Snow Ridge => Intel revealed that it has developed a new 5G system-on-chip solution called Snow Ridge — but it’s not targeted at smartphones or tablets. The new chip is instead designed to be used in wireless base stations, and at the edge of 5G networks, enabling carriers to boost the “intelligence” of next-generation networks.

More cores implies more simultaneous users via Marvell's base station socs;
-> up to 12 cores running up to 1.2 GHz core frequency => Supports up to 500 simultaneous LTE users // CNF73XX
-> up to 16 cores running up to 1.6 GHz core frequency => Supports a range of user counts from 800 user picocell configuration to 3,600 macrocell mode simultaneous active users // CNF75XX

 

[Dayman1225]

A Tremont based 4/4 at 1.9GHz, codenamed Elkhart Lake has appeared on user benchmark

https://twitter.com/x/status/1179048039589105665

 

[DrMrLordX]

Isn't Elkhart Lake the replacement for . . . Denverton?

And SnowRidge is going into comm gear. Not sure what the consumer version of Tremont's supposed to be but I don't think we'll see that anytime soon thanks to Gemini Lake refresh (bleh).

 

[Dayman1225]

Isn't Elkhart Lake the replacement for . . . Denverton?

And SnowRidge is going into comm gear. Not sure what the consumer version of Tremont's supposed to be but I don't think we'll see that anytime soon thanks to Gemini Lake refresh (bleh).

Elkhart Lake is for IoT

Skyhawk Lake replaces Gemini Lake R

Tanner Ridge replaces Denverton

 

[DrMrLordX]

Elkhart Lake is for IoT

Okay, I thought I was wrong but I had a source that said otherwise. It was just old and, you know, wrong. That makes the Elkhart Lake score even less exciting.

Skyhawk Lake replaces Gemini Lake R

Tanner Ridge replaces Denverton

These are the products that personally interest me the most, at least some a "so what can Intel really do with 10nm and tiny cores?" perspective. And sadly they are the ones that are furthest out from release.

 

[Dayman1225]

and a wild Jasper Lake appears, which is also based on Tremont.

https://imgur.com/qLtVIYP

I don't know what this one is for, I had thought Jasper turned into Skyhawk.

 

[Dayman1225]

Intel will be detailing the Tremont architecture on the 24th of October at the Linley Processor Forum

https://twitter.com/x/status/1184861237945012224