The Kaveri Pre-Launch Thread (A10-7800 and A10-6800k @3,5 Ghz)

[DaZeeMan]

Back on topic, though, Kaveri should do fine for it's target market, based on what we've seen so far. For many consumers, it's about the price point, which is why AMD saw notebook APU shipments increase 47% in Q2 2013. As of the end of 2012, APUs made up 75% of their total processor sales.

PC sales are sliding overall, of course, but that discussion really is a separate one from this Kaveri versus Richland comparison.

 

[Abwx]

Well, comparing Kaveri with Richland/Trinity..... There's an awful lot of DDR3 I/O on Kaveri
About twice as much, so maybe we should congratulate you with your prediction!

I used a Kaveri package photo to estimate the horizontal versus vertical die size ratio.
If there's lots of logic in the I/O, for instance timing delay lines, sample registers
and sample selectors then the I/O can scale roughly with the process node.

Hans.

Nice pic , thank for the contribution.


On another note could the redundant financial concerns being
relegated to another thread , the point of this one is Kaveri s
technical specs and perfs and even price...

 

[DaZeeMan]

Nice pic , thank for the contribution.


On another note could the redundant financial concerns being
relegated to another thread , the point of this one is Kaveri s
technical specs and perfs and even price...

My bad partially. Will do!

Also, nice pic there, Hans. Does anyone have any ideas as to why AMD needed to increase the DDR3 I/O area?

 

[SPBHM]

My bad partially. Will do!

Also, nice pic there, Hans. Does anyone have any ideas as to why AMD needed to increase the DDR3 I/O area?

could the die have support for more than 2 DDR3 channels? (not enabled by the Fm2+ platform)

 

[DaZeeMan]

Just had a 'duh' moment... looking at an older press release (Apr 30th), I saw the mention of the 'shared memory architecture', aka HuMA, which we've heard so much about in the last few months, which I didn't consider when I was looking at Hans' pic. Perhaps they needed the extra I/O space to properly route the memory calls under the HuMA framework?

Also, Kaveri was originally supposed to support GDDR5 as well as DDR3. Perhaps there is some 'GDDR5 baggage' in there that currently isn't being used?

Some thoughts anyways.

 

[inf64]

Quad ch. GDDR5 (4x32bit) sits deactivated on die .
Nice comparison Hans . It looks almost like 2x the DDR3 I/O of Trinity.

 

[9enesis]

Quad ch. GDDR5 (4x32bit) sits deactivated on die

hmm...this one begs for the question...are there going to be enthusiast MoBos released with GDDR5 on-board later this year ?:biggrin:

 

[R0H1T]

hmm...this one begs for the question...are there going to be enthusiast MoBos released with GDDR5 on-board later this year ?:biggrin:

Why not mainstream then, if they can price it right then I can certainly see it take off with the masses :thumbsup:

 

[Abwx]

From the slide on the previous page Kaveri is for 15W-95W power budget,
wise segmentation given Kabini s positioning as 15W and below ; looks
like AMD is to have a nice APU offering in 2014.

 

[inf64]

hmm...this one begs for the question...are there going to be enthusiast MoBos released with GDDR5 on-board later this year ?:biggrin:

I doubt that :/.

 

[Shivansps]

So the GDDR5 controller is on die but deactivated and has no pins for it, seems legit.

 

[blackened23]

So the GDDR5 controller is on die but deactivated and has no pins for it, seems legit.

GDDR5 isn't going to happen for a LGA Desktop CPU. GDDR5 is soldered and you can't simply add it to a modular motherboard. That's ignoring the fact that you can't BUY standalone GDDR5 either.

The niche for APUs is for low end HTPCs. Even if a motherboard vendor could pay the premium for GDDR5, and design a custom motherboard for that GDDR5, jacking up the motherboard price in the process - they won't do that and pair it with a low-end CPU.

 

[SPBHM]

I think it could be interesting for a laptop, but at the same time GDDR5 also uses more power, but it would certainly be of great help for the IGP.

 

[9enesis]

GDDR5 isn't going to happen for a LGA Desktop CPU...

says who ? the fella with an UFO in his avatar ?:biggrin:

and btw - it has already (somewhat) happened , look : http://us.playstation.com/ps4/index.htm

 

[Homeles]

So the GDDR5 controller is on die but deactivated and has no pins for it, seems legit.

How, exactly, are you sure that the PGA doesn't support GDDR5?

Let me answer that for you: you have no way of knowing.

Anyway, there are much bigger obstacles preventing GDDR5 from being in mainstream computers.

 

[parvadomus]

Quad ch. GDDR5 (4x32bit) sits deactivated on die .
Nice comparison Hans . It looks almost like 2x the DDR3 I/O of Trinity.

Probably a DDR4 controller. Just like in phenom II, they had both DDR2 and DDR3 controllers.

 

[sefsefsefsef]

Even if there are multiple memory controllers for multiple different memory standards, they would all still use the same PHYs. PHYs take a lot of die area, and they would not build double the number of PHYs unless they were planning to use them.

My guess is it's either a 256-bit DDR3 interface, or it's a trick of the eye and still just a regular 128-bit DDR3 interface that we somehow aren't measuring correctly.

 

[Arkadrel]

Well, comparing Kaveri with Richland/Trinity..... There's an awful lot of DDR3 I/O on Kaveri
About twice as much, so maybe we should congratulate you with your prediction!

I used a Kaveri package photo to estimate the horizontal versus vertical die size ratio.
If there's lots of logic in the I/O, for instance timing delay lines, sample registers
and sample selectors then the I/O can scale roughly with the process node.

Hans.

Quad Channel you say? ^-^

*wonders if there will be motherboards for it in near future*

I know its stupid but I feel like dual channel DDR3 is pretty limited for a APU like this.

 

[Fjodor2001]

GPUs are denser than CPU cores. By having a larger portion of the die as a iGPU you have higher density than having more die dedicated to CPU cores.

Since Kaveri has 47% of its die as a GPU then it has higher density than Haswell with a iGPU of 31% of its die.

But actually if you use both iGPU and L2/3 caches the situation is changing again. And since both Kaveri and Haswell use large amounts of L2 and L3 caches you could measure the CPU cores alone to find out which has the higher density. Anyway, talking about Transistor density in two different designs using different Litho processes is pointless.

edit: Just to point out, if we knew the transistor count of each of the iGPU and the actual size, you could measure the density and make better conclusions/estimations about various topics such as performance per density or iGPU transistor density etc.

Yes, I agree. But as was concluded by Abwx earlier here, the 4770K and A10-7850K have about the same percentage of die area allocated to high density blocks (iGPU and cache). Hence they should be pretty similar in that regard.

And since A10-7850K has 9.80M transistors/mm^2, compared to 7.91M/mm^2 for 4770K, so far the evidence points to GloFo 28 nm being denser than Intel 22 nm.

But if someone has evidence of the contrary, I'm open to change my opinion on that. As you indicated, the best would be if we could get exact die area and transistor count for the part of the 4770K and A10-7850K dies occupied by a similar block type (e.g. GPU or CPU core). Then we could calculate the transistor density for that part alone, which would make it more comparable. I.e. calculate transistors/mm^2 for only the GPU or CPU cores, and compare that between 4770K and A10-7850K.

 

[Homeles]

7.91M/mm^2 for 4770K, so far the evidence points to GloFo 28 nm being denser than Intel 22 nm.

But if someone has evidence of the contrary, I'm open to change my opinion on that. As you indicated, the best would be if we could get exact die area and transistor count for the part of the 4770K and A10-7850K dies occupied by a similar block type (e.g. GPU or CPU core). Then we could calculate the transistor density for that part alone, which would make it more comparable. I.e. calculate transistors/mm^2 for only the GPU or CPU cores, and compare that between 4770K and A10-7850K.

I've already given you evidence to the contrary. Stop being so obstinate.

Intel: 0.092um2
GloFo: 0.120um2

Will you give it a rest already?

Leave the hostility at home
-ViRGE

 

[mrmt]

Yes, I agree. But as was concluded by Abwx earlier here, the 4770K and A10-7850K have about the same percentage of die area allocated to high density blocks (iGPU and cache). Hence they should be pretty similar in that regard.

Did you try to compare Trinity with Vishera?

 

[Fjodor2001]

I've already given you evidence to the contrary. Stop being so obstinate.

Intel: 0.092um2
GloFo: 0.120um2

Will you give it a rest already?

So how come A10-7850K has higher transistor density than 4770K, when also taking into account that they both have similar percentage of die area allocated to high density blocks (GPU and cache)?

Are you saying AMD's cache, CPU cores, and/or GPU cores are denser by design than Intel's? Or what other explanation are you suggesting?

 

[Abwx]

So how come A10-7850K has higher transistor density than 4770K, when also taking into account that they both have similar percentage of die area allocated to high density blocks (GPU and cache)?

Are you saying AMD's cache, CPU cores, and/or GPU cores are denser by design than Intel's? Or what other explanation are you suggesting?

He could as well have used a single other parameter as straw,
why not connexions thickness or gate legnth or whatever
other part that seems falsely favourable.

As you point it what matters is the sum of all thoses metrics
down to the bottom line wich is the transistors/mm2, all the
rest is useless debate about details.

 

[mikk]

I'm not even sure if AMDs transistor specification is correct since Bulldozer was initially specified with 2.0 billion transistors and later corrected to 1.2 billion.

 

[ShintaiDK]

So how come A10-7850K has higher transistor density than 4770K, when also taking into account that they both have similar percentage of die area allocated to high density blocks (GPU and cache)?

Are you saying AMD's cache, CPU cores, and/or GPU cores are denser by design than Intel's? Or what other explanation are you suggesting?

How come Trinity got a much higher density than Vishera? Remember Vishera got a whole 16MB cache with 4x2MB L2 and 1x8MB L3.

And again, I doubt the transistor count for Kaveri is even remotely correct.