The Stilt
Golden Member
- Dec 5, 2015
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Had a look at the production bios of EPYC 1P board. ZP-B2 is using it's own µcode version, which usually implies that there are at least some actual differences in the silicon. Still need to check if ZP-B1 can work with this µcode version.
There should be no reason why EPYC (compared to consumer Ryzen's / TR) would require different die revision, unless there were issues in something xGMI related (only used in 2P, i.e EPYC).
In any case if the ZP-B2 stepping is a real deal and not a "marketing stunt" to differentiate the consumer and server parts more apart each other, we should start to see ZP-B2 being used in consumer parts pretty soon as well. It would be completely idiotic to have
two feature wise identical die revisions in production. Especially when that is the completely opposite to what AMD has been doing so far with Zeppelin.
There should be no reason why EPYC (compared to consumer Ryzen's / TR) would require different die revision, unless there were issues in something xGMI related (only used in 2P, i.e EPYC).
In any case if the ZP-B2 stepping is a real deal and not a "marketing stunt" to differentiate the consumer and server parts more apart each other, we should start to see ZP-B2 being used in consumer parts pretty soon as well. It would be completely idiotic to have
two feature wise identical die revisions in production. Especially when that is the completely opposite to what AMD has been doing so far with Zeppelin.