[THG]Core i7-4770K: Haswell's Performance-Previewed

[Lonbjerg]

http://news.cnet.com/8301-1001_3-57578193-92/intels-next-gen-haswell-chip-now-shipping-to-pc-makers/

Haswell is already shipping to OEMs and distributors. So warehouses are ready with Haswell products well in advance. Cant be long before some shop starts sell them before launch as usual.

Intel is really becoming a beast after tick-tock.
We don't even have official previews out...but chips are already in the channel...Intel's process domination put to full effect.

 

[Lonbjerg]

That was not integrated in to the CPU die. Sandybridge was the first Intel iGPU released on January 2011 followed by AMD Llano launched in June of the same year.

And they are still behind including a node advantage.

Edit: When im talking about the AMD way, im talking of Intel focusing more and investing more logic for the iGPU than the CPU part.

Just like Core2Quad wasn't a "native quadcore"? :whiste:

 

[NTMBK]

Just like Core2Quad wasn't a "native quadcore"? :whiste:

Well no, it wasn't. :hmm: Clearly Intel agree that all four cores on one die is the better solution, because that's what they did in the following generation. It wasn't elegant, but it was a sensible solution to make the product they needed.

 

[mrmt]

Well no, it wasn't. :hmm: Clearly Intel agree that all four cores on one die is the better solution, because that's what they did in the following generation. It wasn't elegant, but it was a sensible solution to make the product they needed.

Better, more elegant compared to what?

For the guys selling the chip, where every ounce of extra performance is interesting, yes, it is better to have everything on the same die.

For the guys working in a fab, trying to raise yields, and for the guys responsible for running the company, this question deserves further analysis.

An MCM, by the virtue of generating smaller parts is *much* better for yields (and costs) management than a huge monolithic part. Also validation of a smaller, simpler part is easier than the validation of a bigger, monolithic part. This is the reason why AMD never reached a "true" 16-core Bulldozer, or that only after 12 months after the architecture introduction Nvidia managed to launch Titan.

That said, who is more elegant:

- The company that pursue technically complex solutions in immature nodes for the sake of pure performance, the company that sell die-salvaged parts that carries the same cost tag of full-fledged parts, further eroding price at the bottom of their line up, culminating in atrocious financial results?

- Or the company that pushed mature, proven solutions to their limits achieving better results than the other company in the performance area, but effectively blowing the competition in the sky in the economic/costs area?

This trade off reflects how differently both companies are managed, not only AMD technical prowess. Intel is a more conservative in the way they introduce new goodies in the chip (not in a tick, somethings in server first), and they do a lot of work to keep production and design in synchronization.

As AMD never reached the level of refinement in the integration between production and design that Intel has, and never shied away from die-salvaging to the point of the absurd, they introduce nice technical innovations ahead of Intel but sometimes they do screw the porch, like they did with Phenom, with Llano, with Bulldozer, etc. This reckless approach to costs is one of the ingredients of the sad state of affairs we currently verify at AMD.

 

[NTMBK]

Better, more elegant compared to what?

For the guys selling the chip, where every ounce of extra performance is interesting, yes, it is better to have everything on the same die.

For the guys working in a fab, trying to raise yields, and for the guys responsible for running the company, this question deserves further analysis.

An MCM, by the virtue of generating smaller parts is *much* better for yields (and costs) management than a huge monolithic part. Also validation of a smaller, simpler part is easier than the validation of a bigger, monolithic part. This is the reason why AMD never reached a "true" 16-core Bulldozer, or that only after 12 months after the architecture introduction Nvidia managed to launch Titan.

That said, who is more elegant:

- The company that pursue technically complex solutions in immature nodes for the sake of pure performance, the company that sell die-salvaged parts that carries the same cost tag of full-fledged parts, further eroding price at the bottom of their line up, culminating in atrocious financial results?

- Or the company that pushed mature, proven solutions to their limits achieving better results than the other company in the performance area, but effectively blowing the competition in the sky in the economic/costs area?

This trade off reflects how differently both companies are managed, not only AMD technical prowess. Intel is a more conservative in the way they introduce new goodies in the chip (not in a tick, somethings in server first), and they do a lot of work to keep production and design in synchronization.

As AMD never reached the level of refinement in the integration between production and design that Intel has, and never shied away from die-salvaging to the point of the absurd, they introduce nice technical innovations ahead of Intel but sometimes they do screw the porch, like they did with Phenom, with Llano, with Bulldozer, etc. This reckless approach to costs is one of the ingredients of the sad state of affairs we currently verify at AMD.

I'm not talking about AMD being more elegant than Intel, and I never said that. I talked about the multichip module being less elegant than Intel's own single chip solution which was their follow-up.

In general, Intel's tick-tock rhythm is the more refined solution, quite clearly. It mitigates risks by only changing a handful of parameters at a time, instead of going through periods of stagnation followed by insane gambles (see: Bulldozer). Instead of just disabling cores on whole dies, Intel has the volumes to let them produce multiple different dies (dual core GT1, dual core GT2, quad core GT1, quad core GT2). Getting more parts from the same quantity of silicon is obviously the cleaner approach- and the reason AMD got around to making a true dual-core die for their Athlon II X2s, once they got the yields up on the quad cores and it became economically viable.

But again- my post wasn't comparing the companies at all. It simply talked about multi-chip modules. Multi-chip-modules are a messy hack. They increase the performance costs of communication between the dies. They stop the dies sharing components, like caches. They are only ever present as a brief intermediate stage, before the parts are integrated into one- see Core 2 Quad -> Core i7, integrating the x87 FPUs into the CPU, and integrating the graphics into the same die with Sandy Bridge. Putting the parts together on one die, with fast on die communications, is just better- so long as the manufacturing is feasible.

(As for screw the pooch- not sure why you single out Llano? Clearly Phenom had the TLB issue and crappy clockspeeds, and Bulldozer had a whole sackful of issues, but Llano was a good part as far as I'm concerned.)

 

[mrmt]

I'm not talking about AMD being more elegant than Intel, and I never said that. I talked about the multichip module being less elegant than Intel's own single chip solution which was their follow-up.

I'm saying that as an overall solution, a compromise between profitability, design overhead, costs and manufacturing, MCM are elegant solutions. It's not just the solution that yield the better performing part overall, but that's not to say that they aren't valid or elegant.

The fact that Intel can have thread synchronization over FSB as good as AMD thread synchronization on its monolithic implementation says a lot of the elegance I'm talking about.

(As for screw the pooch- not sure why you single out Llano? Clearly Phenom had the TLB issue and crappy clockspeeds, and Bulldozer had a whole sackful of issues, but Llano was a good part as far as I'm concerned.)

It was a part too complex for the troubled GLF 32nm process, even Trinity yielded better than it and Trinity isn't a star on yields. The result was a late part that had yields issues for most of its useful life.

Sure, the process has a nice share on the trouble here, but in the end it doesn't matter where was the trouble, the company didn't make as much money as it could.

 

[NTMBK]

I'm saying that as an overall solution, a compromise between profitability, design overhead, costs and manufacturing, MCM are elegant solutions. It's not just the solution that yield the better performing part overall, but that's not to say that they aren't valid or elegant.

The fact that Intel can have thread synchronization over FSB as good as AMD thread synchronization on its monolithic implementation says a lot of the elegance I'm talking about.

I'd say that they're certainly valid, and you can make good business cases for them. Risk reduction and time to market being the major factors in it. But I still refuse to call them elegant From a purely design point of view (ignoring the entirely justified business reasons), they're about as elegant as a dual-GPU graphics card.

It was a part too complex for the troubled GLF 32nm process, even Trinity yielded better than it and Trinity isn't a star on yields. The result was a late part that had yields issues for most of its useful life.

Sure, the process has a nice share on the trouble here, but in the end it doesn't matter where was the trouble, the company didn't make as much money as it could.

To be honest, Llano should have been the ideal part to launch on a new process- it used existing Stars cores with minor tweaks, and existing VLIW5 graphics. Both were known quantities which had been shipped in plenty of products and had the rough edges worn down. It's the closest in recent times that AMD has come to the tick-tock method, updating an existing architecture to run on a new node. It's just that the new node was utterly, utterly borked to begin with. (Llano flushed out a lot of the issues with the node, so Trinity benefited from the extra year of progress on the foundry side- plus it was based on Bulldozer, which had been tried out on 32nm already.)

 

[Piroko]

I'm saying that as an overall solution, a compromise between profitability, design overhead, costs and manufacturing, MCM are elegant solutions.

MCM on an interposer didn't happen, although I wouldn't consider it the most elegant solution. MCM/chip stacking will probably gain traction within the next few generations, but Intel doesn't seem to be in much of a hurry. Which in turn tells me that it's not that great of a compromise just yet.

 

[GlacierFreeze]

you would be looking at haswell-e.

Oh okay. Thanks.

 

[Arkadrel]

The new "HD 4600" Intel has looks good.
Looks to be 18-25% behinde Trinity but still, its getting closer.

AMD needs to launch some Richland APUs to again reach comfortable leads compaired to Intel's IGPs.

 

[CHADBOGA]

Geez, when the hell are we gonna get a performance preview that is supposedly representative of what Haswell is capable of? :\

 

[Borealis7]

June 3rd i guess...

 

[ShintaiDK]

Might be more open information after IDF in Beijing this week (11-12 april.).

 

[Homeles]

Might be more open information after IDF in Beijing this week (11-12 april.).

Good to know.

 

[mikk]

This test is outdated, the 15.31 series is the driver which improved performance in various games and fixed the low clock issue.

Semiaccurate measured average +18% from 6 games for the new 15.31 driver.

http://semiaccurate.com/2013/04/15/...est/intel-hd-4000-graphics-driver-comparison/

 

[TY-1]

Geez, when the hell are we gonna get a performance preview that is supposedly representative of what Haswell is capable of? :\

Computex 2013

 

[inf64]

Still hoping for a miracle +20% IPC gain?

 

[mavere]

A plethora of AVX2 optimizations have landed on x264's main repository. Performance commits almost always have extremely specific percentage gain numbers, but for obvious reasons, there are none here.

On the off-chance some of you are free from an NDA, please feel free to post comparison numbers.

 

[mavere]

Found this: http://www.scribd.com/doc/137419114/Introduction-to-AVX2-optimizations-in-x264

Assuming that all the important SIMD functions were listed there and that they average to about a 50% speedup (which could be conservative as the very crucial SATD alone has an 84% gain). Based on the developer's guidelines, that works out to a 20% 'free' boost in encoding fps outside of clock speeds or IPC and will only increase as more optimizations are done.

Not bad, I guess.

 

[dbcoopernz]

Aha! I just came here to post that.

The developer is answering questions over at Hacker News:

https://news.ycombinator.com/item?id=5598010

 

[tweakboy]

I am now thinking about grabbing a 3930k and not waiting for haswell.

NOOOOOOOOOOOOOOOOOOOOO! dont do it.

Ivy Bridge E 4930k in a couple of months for 500 or 600 dollars.

What advantage it gives Sandy E ,,,,, is ,,,, higher OCes , up to 5Ghz and beyond with air cooling. Its 22nm Sandy is 32nm ,,, it will have 6 cores 12 threads........ socket 2011 ..........................