TSMC catching up with Intel on leading edge process nodes

[raghu78]

http://www.fool.com/investing/gener...the-troubling-story-behind-intels-chip-m.aspx

An interesting article by Ashraf Eassa who is a longtime Intel supporter. TSMC 7nm looks likely to face off with Intel 10nm in 2018. This could be a boon for Intel competitors like Apple, Qualcomm, AMD, Nvidia and others.

From Techinsights analysis

http://www.eetimes.com/author.asp?section_id=36&doc_id=1328711&page_number=4

Contacted Gate pitch (CG)
Intel 14nm - 70nm
TSMC 16FF+ - 88nm

Minimum Metal Pitch (M1)
Intel - 52nm
TSMC 16FF+ - 70nm

Logic Density = CG x M1
Intel 14nm = 70 x 52 = 3640
TSMC 16FF+ = 6160

http://community.cadence.com/cadenc...0nm-is-ready-for-design-starts-at-this-moment

http://www.eetimes.com/document.asp?doc_id=1327725

TSMC 10nm provides 2.1x area scaling over 16FF+. So logic density would be roughly

TSMC 10nm = 6160 x 0.48 (1/2.1) = 2956
TSMC 7nm = 2956 x 0.55 to 2956 x 0.6 = 1626 to 1774 (40-45% shrink from 10nm)

Intel 10nm = 3640 x 0.5 (Assuming perfect scaling)
= 1820

Performance
TSMC 10nm vs 16FF+ - 18% faster transistor performance at same power or 40% lower power at same performance
TSMC 7nm vs 10nm - 10-15% faster transistor performance at same power or 25-30% lower power at same performance
TSMC 7nm vs 16FF+ - 30-35% higher performance at same power or 55-58% lower power at same performance

TSMC 7nm would have slightly lower density than Intel 10nm. TSMC 7nm transistor performance characteristics should be very competitive with Intel 10nm. This would give the fabless companies like Qualcomm, Nvidia, AMD a level playing field against Intel. Intel's time to market lead at leading edge process nodes is about to come to an end.

http://www.tsmc.com/uploadfile/ir/quarterly/2015/4T5Um/E/TSMC 4Q15 transcript.pdf

TSMC expects major growth in 3 areas with 10nm/7nm. High end smartphone, High performance computing and VR/Gaming/Automotive. I am looking forward to see AMD Zen+ server CPUs fabbed at TSMC 7nm being released against Intel 10nm Cannonlake server CPUs.

 

[Arachnotronic]

FWIW, TechInsights' measurements are wrong; actually their analysis seems pretty flawed in general. 14LPP/16FF+ do not offer any gate pitch/metal pitch changes from 14LPE/16FF. The main change, AFAIK, is that both Samsung and TSMC made their fins taller, allowing for better xtor performance.

16FF+ contacted gate pitch = 90nm, minimum metal is 64nm. Samsung's numbers are 78nm/64nm

 

[Burpo]

The "fool" sources are irrefutable ..

 

[raghu78]

FWIW, TechInsights' measurements are wrong.

16FF+ contacted gate pitch = 90nm, minimum metal is 64nm. Samsung's numbers are 78nm/64nm

I am more willing to believe third party measurements than the manufacturer claims. btw these are from analysis of Intel Core M(Intel 14nm), Samsung Exynos 7420 (Samsung 14LPE) and Apple A9 (TSMC 16FF+) If you have chipworks analysis which disproves techinsights then thats something worth mentioning and discussing.

 

[Arachnotronic]

I am more willing to believe third party measurements than the manufacturer claims. btw these are from analysis of Intel Core M(Intel 14nm), Samsung Exynos 7420 (Samsung 14LPE) and Apple A9 (TSMC 16FF+) If you have chipworks analysis which disproves techinsights then thats something worth mentioning and discussing.

The numbers TechInsights gave are clearly within the ballpark and there is room for measurement error, for sure.

Anyway, I think one thing you need to be careful about is assuming that AMD (and NV) will go through nodes as quickly as, say, an Apple.

For example, AMD will begin sampling 14nm server parts later this year, production parts in 1H 2017-ish. I would expect them to do one more 14nm part at least (i.e. Zen+). Remmeber in a recent interview Lisa Su said this:

AMD is establishing a number of products on 14-nm FinFET in 2016, Su said. “But it will be a long node. It will last three, four, five years. But within that node we can do a lot in optimization, and within that node, we can do a lot on power... once you’re in the node, it’s all about architecture.”

So they're clearly planning to stay on 14LPP for quite a while, and the comment about 3 years suggest they don't really plan for a node transition until 2018/2019 and I doubt they will skip right on down to 7nm, since that capacity will be hogged by Apple and Qualcomm for at least a year IMO.

Just my 2¢...

 

[raghu78]

The numbers TechInsights gave are clearly within the ballpark and there is room for measurement error, for sure.

Anyway, I think one thing you need to be careful about is assuming that AMD (and NV) will go through nodes as quickly as, say, an Apple.

For example, AMD will begin sampling 14nm server parts later this year, production parts in 1H 2017-ish. I would expect them to do one more 14nm part at least (i.e. Zen+). Remmeber in a recent interview Lisa Su said this:

So they're clearly planning to stay on 14LPP for quite a while, and the comment about 3 years suggest they don't really plan for a node transition until 2018/2019 and I doubt they will skip right on down to 7nm, since that capacity will be hogged by Apple and Qualcomm for at least a year IMO.

Just my 2¢...

Not really. I believe if AMD has a competitive Zen architecture and roadmap they would push for transition to the leading edge nodes at the earliest. That would be the case especially for high performance computing (servers) and discrete graphics. AMD would love to have a process node parity with Intel when competing in servers.

Assuming Zen launches in early 2017 at TSMC 16FF+ we can expect a Zen+ next gen using 10nm in early 2018 and a Zen++ third gen using 7nm in early 2019. That means roughly a year after TSMC starts 10nm / 7nm ramp. This timing would be ideal as yields would be robust and suitable for manufacturing 300 - 350 sq mm dies. AMD is likely to stick to MCM config chips to hit higher core count as they intend to do for Zen.

On Intel's side assuming Intel Skylake 14nm Xeon server CPUs in Q1 2017 and Kabylake 14nm server CPUs in Q1 2018 we are likely to see Cannonlake 10nm server CPUs in Q1 2019. Typically Intel Xeon server CPUs are atleast 12-15 months behind the process node launch. So I think AMD has a good opportunity to compete with Intel on a level playing field.

 

[Arachnotronic]

Not really. I believe if AMD has a competitive Zen architecture and roadmap they would push for transition to the leading edge nodes at the earliest. That would be the case especially for high performance computing (servers) and discrete graphics. AMD would love to have a process node parity with Intel when competing in servers.

Assuming Zen launches in early 2017 at TSMC 16FF+ we can expect a Zen+ next gen using 10nm in early 2018 and a Zen++ third gen using 7nm in early 2019. That means roughly a year after TSMC starts 10nm / 7nm ramp. This timing would be ideal as yields would be robust and suitable for manufacturing 300 - 350 sq mm dies. AMD is likely to stick to MCM config chips to hit higher core count as they intend to do for Zen.

On Intel's side assuming Intel Skylake 14nm Xeon server CPUs in Q1 2017 and Kabylake 14nm server CPUs in Q1 2018 we are likely to see Cannonlake 10nm server CPUs in Q1 2019. Typically Intel Xeon server CPUs are atleast 12-15 months behind the process node launch. So I think AMD has a good opportunity to compete with Intel on a level playing field.

If AMD can move through the nodes that quickly that would be very good for them (and basically a nightmare/doomsday scenario for Intel), there is no question of that. However, the comment from Su really doesn't suggest that they plan to/have the resources to move that fast.

 

[ozzy702]

If AMD can move through the nodes that quickly that would be very good for them (and basically a nightmare/doomsday scenario for Intel), there is no question of that. However, the comment from Su really doesn't suggest that they plan to/have the resources to move that fast.

Agreed. It all comes down to whether AMD can deliver with the initial Zen product or not. If it's a home run then AMD should sell chips quite well and get a major boost to their stock and more to spend on R&D. If Zen is a flop and doesn't sell well then I can see them being stuck on 14nm for a very long time and just make revision after revision instead of moving from process to process as they become available.

 

[Arachnotronic]

Agreed. It all comes down to whether AMD can deliver with the initial Zen product or not. If it's a home run then AMD should sell chips quite well and get a major boost to their stock and more to spend on R&D. If Zen is a flop and doesn't sell well then I can see them being stuck on 14nm for a very long time and just make revision after revision instead of moving from process to process as they become available.

That's a fair assessment. If Zen can bring in substantial revenue, then this would be a great first step on the road back to health and I could see a quite good future for them. If Zen is a flop, then I just can't see how the company can be saved at that point outside of a MASSIVE resurgence in dGPU.

The Zen launch will be very much a "do or die" moment for the company.

 

[raghu78]

If AMD can move through the nodes that quickly that would be very good for them (and basically a nightmare/doomsday scenario for Intel), there is no question of that. However, the comment from Su really doesn't suggest that they plan to/have the resources to move that fast.

Lisa Su's comments are in general and do not talk about specific product segments. TSMC also states a very long life for their 16nm FINFET variants. btw if Zen is a competitive architecture then they will be able to improve their revenues/profits and increase their investments to move asap to the leading edge, especially in the most lucrative market segments where their margins allow them to absorb increased costs.

That's a fair assessment. If Zen can bring in substantial revenue, then this would be a great first step on the road back to health and I could see a quite good future for them. The Zen launch will be very much a "do or die" moment for the company.

agree completely. Zen is a do or die moment for AMD.

 

[frozentundra123456]

That may be true, but Su's comments are in general quite.....optimistic. If they had plans to move to a newer node quickly, I highly doubt she would not have mentioned something about it. Especially since she said just the opposite.

Actually, despite all the statements that everything is on time, I think AMD will still have its hands full with a new cpu architecture, a new process, a new line of dgpus, not to mention that they still have to transition their apus to zen/14 nm, and maybe HBM.

 

[nismotigerwvu]

If AMD can move through the nodes that quickly that would be very good for them (and basically a nightmare/doomsday scenario for Intel), there is no question of that. However, the comment from Su really doesn't suggest that they plan to/have the resources to move that fast.

Doomsday might be a bit strong of a word as even if Intel lost their manufacturing lead overnight they would still have some of the best engineers on the planet working for them. However, more than a few people would be questioning if going as far into the realm of diminishing returns on their investments for getting leading edge nodes out so quickly was worth it in the long run if those billions might not even have given them a decade of maintained generational lead. While I'd argue it was worth it for them, a good counterpoint would be that Intel could have had higher ROI with slowed cycle as Westmere was more than capable of competing with Piledriver despite being 2 and a half years older.

 

[nismotigerwvu]

Oh and a true doomsday for them would be if the successor to silicon comes sooner than expected and is a material they haven't put much R&D into. If IBM announced that POWER 9 was being fabbed from graphene (or some other exotic material) the collective gasp from Intel HQ would collapse Santa Clara into a black hole.

 

[Arachnotronic]

Doomsday might be a bit strong of a word as even if Intel lost their manufacturing lead overnight they would still have some of the best engineers on the planet working for them.

If AMD could gain a manufacturing edge on Intel and could implement a competent architecture, I think you would see AMD gain significant share in PCs and servers very, very quickly. Enough to have a material impact on Intel's financial results and hurt its stock price fairly significantly.

 

[erunion]

Oh and a true doomsday for them would be if the successor to silicon comes sooner than expected and is a material they haven't put much R&D into. If IBM announced that POWER 9 was being fabbed from graphene (or some other exotic material) the collective gasp from Intel HQ would collapse Santa Clara into a black hole.

The chance of that happening is zero.

IBM just paid GF to take their fab business. If they had a disruptive litho technology like that they wouldn't have simply given it away.

 

[NTMBK]

The chance of that happening is zero.

IBM just paid GF to take their fab business. If they had a disruptive litho technology like that they wouldn't have simply given it away.

Didn't IBM keep their process R&D arm, and just get rid of the production fabs? Seems like exactly what you would do if you were preparing to dump silicon and move to something new.

EDIT: Not that I expect them to pull a massive breakthrough out of their arse any time soon. Material science is hard.

 

[el etro]

In the truth Intel's process lead did not change after the arrive of FinFets into the market. Intel's lead appears to be increasing, tho.
Also DK says Intel will get to QWFETs(the next big technique in transistor architecture, will be added to SiGe, HK/MG and FF to increase performance and lower power).

Didn't IBM keep their process R&D arm, and just get rid of the production fabs? Seems like exactly what you would do if you were preparing to dump silicon and move to something new.

Is this. From what i know.

 

[mrmt]

Didn't IBM keep their process R&D arm, and just get rid of the production fabs? Seems like exactly what you would do if you were preparing to dump silicon and move to something new.

Process R&D went to GLF. POWER R&D stayed with IBM.

This is exactly what you wouldn't do if you were close to be able to dump silicon and move to something new. You would still need a fab to manufacture chips and the last thing you want is to share this with someone else.

But this is exactly what you would do if you didn't want to commit enough resources to keep your business in the race.

 

[dark zero]

The ones who leaves finfets for something better wins the race.

 

[witeken]

TSMC 10nm does *not* scale 2.1x. TSMC has reported a 0.52x number.

Here's SRAM:

Intel 22nm = 0.108µm² / 0.092µm² (high density)
TSMC 16nm = 0.07µm² (high density)
Samsung 14nm = 0.080µm² / 0.064µm² (high density)
Intel 14nm = 0.0588µm² / 0.0500µm²
Samsung 10nm = 0.049µm² / 0.040µm²
TSMC 10nm = 0,0364µm²F (high density)
Intel 10nm = 0.0312µm²F / 0,0272µm²F (with assumed 1.84x scaling like 22->14 high density)
TSMC 7nm = 0.0207µm²F (high density / -43%)

Source 7nm:

TSMC has made a working SRAM at 7nm, Sun reported. The node should deliver 40-45% less area and either 10-15% higher speeds or 25-30% lower power than the 10nm node, he said.

Samsung:

ISSCC organizers said the device has “the smallest [SRAM] bitcells to date,” measuring 0.040μm for a high density (HD) and 0.049μm for a high current (HC) version.

“Compared to Samsung’s 14nm SRAM at 0.064μm2, the 10nm cell is a 0.63X shrink, certainly less than ideal," said David Kanter a microprocessor analyst for The Linley Group and Real World Technologies.

 

[Dresdenboy]

The Zen launch will be very much a "do or die" moment for the company.

Yep, or close to that (serious cuts, only leaving SoC & GPU). Lacking a strong market infrastructure and huge base demand, a lot depends on pure performance metrics (AMD has to show). The bigger the miss, the smaller the gross margins. There is a range, which allows to survive, but not to grow.

 

[raghu78]

TSMC 10nm does *not* scale 2.1x. TSMC has reported a 0.52x number.

Here's SRAM:

Intel 22nm = 0.108µm² / 0.092µm² (high density)
TSMC 16nm = 0.07µm² (high density)
Samsung 14nm = 0.080µm² / 0.064µm² (high density)
Intel 14nm = 0.0588µm² / 0.0500µm²
Samsung 10nm = 0.049µm² / 0.040µm²
TSMC 10nm = 0,0364µm²F (high density)
Intel 10nm = 0.0312µm²F / 0,0272µm²F (with assumed 1.84x scaling like 22->14 high density)
TSMC 7nm = 0.0207µm²F (high density / -43%)

Source 7nm:

Samsung:

I am not going to argue further but I will leave TSMC statements regarding 10nm made on their Q3 2015 earnings call.

http://www.tsmc.com/uploadfile/ir/quarterly/2015/3C2bO/E/TSMC 3Q15 transcript.pdf

page 5

"The third part, I'd like to update you about our leading-edge technology development. Our 10-nanometer technology development is well ontrack. This technology has a logic density of 2.1 times of its previous generation, that's 16 FinFET Plus, with performance of 20% enhancement or a power consumption reduction of 40%. During this quarter, we will freeze the process and begin technology qualification for our 10-nanometer technology. Customer product tape-outs will soon begin in next spring"

 

[MrTeal]

Really, those numbers aren't terribly far off. 0.52x on the SRAM is 1.92x density. It's not inconceivable that the density increase on logic is slightly higher than SRAM cells and both statements are true, especially if 2.1 is a rounded number.

 

[ShintaiDK]

Will be interesting to see when TSMC can deliver products. Or if the dates needs the usual +2 years attached.

But the ambitions are high set. Lets just hope the economy doesn't go down before. Will be interesting to see after smartphone companies Q1 results.

 

[Fjodor2001]

Intel 10nm = 0.0312µm²F / 0,0272µm²F (with assumed 1.84x scaling like 22->14 high density)

Do we have any source confirming the 1.84x scaling from Intel 14->10 nm, or is that just a guess?

Since Intel had severe yield issues on 14 nm, couldn't it be that they want to play it safe on 10 nm and thus go for a less dense 10 nm process than scaling it 1.84x compared to 14 nm?