[TT]AMD introduces heterogeneous Uniform Memory Access

[sontin]

There is a reason why they released Richard. Kaveri is not ready for 2013. It would be much more stupid to release to different kind of APUs in one year.

 

[Arkadrel]

HSA exists since 2011. And we still talking about powerpoint slides. Kaveri comes 2014 to the market. Nearly one year from now. And it's the only product which will feature all powerpoint slides features.

A 512SP APU. Low-End next year.

Good things take time, when your not swimming in a pool of money.

Sometimes carefull planning, and well thoughtout planning >
throwing money at a wall and seeing what sticks.

Also AMD cannot afford to just throw money at wall, see what sticks.
So they are forced to think things through carefully, that means things take time.

The concept itself predates 2011 but AMD, with its limited resources, is the one that'll deliver it first on x86 is what's really noteworthy & btw where did you get that 2014 from ?

Whats note worthy is how many others are following, if not HSA directly then in a vain very simular.

To me that speaks volumes.
The concept must be really solid if everyone is on board with it, or copying it in some form.

 

[Olikan]

this tecnology was created since GCN shipped, it took them a very long time to finish it

probably the best slide...

 

[lagokc]

Interesting article at Ars. If games are being optimized for this for the PS4 and Xbox-whatever then AMD might actually be the best choice for gaming next year IF they can execute decently.

 

[parvadomus]

HSA exists since 2011. And we still talking about powerpoint slides. Kaveri comes 2014 to the market. Nearly one year from now. And it's the only product which will feature all powerpoint slides features.

A 512SP APU. Low-End next year.

[redacted]. 512SP is a good amount for gpgpu, havent you seen certain gpgpu benchmarks where an APU performs similar to a 7970? Theres obviously a bottleneck somewhere, and probably this address it.

Be nice. That's an order
-ViRGE

 

[mrmt]

Guys, layman question of the day:

- Won't this more complex memory management add latency?

 

[Jaydip]

Guys, layman question of the day:

- Won't this more complex memory management add latency?

I thought about that first but it seems they implemented it via hardware level so hopefully not much burden for programmers.As both share same memory, latency should be minimal at best.

 

[NTMBK]

Guys, layman question of the day:

- Won't this more complex memory management add latency?

This should be less complex than the existing memory management, actually, and remove some latencies. Or at least that's the theory

 

[MisterMac]

Stop white knighting AMD fans.

I'll demand more from AMD - than stupid powerpoint slides that tell me nothing more than the idea in 1 sentence.

Show the performance gains of similar raw output in a dGPU or nonunified system vs a unified one.

Similarly i expect more from Haswell - than they probably will deliver.
And i'll whine about that.

hUMA is a base building block for a HSA Dream - so where the beep is the gains ?
Where's the oomf?

They're just showing slides of 1 simple building block with not even some nice marketing claims?
What?
Come on.


This is the IMC all over again - the same sort of "OMFG FIRST" that claim AMD shall take charge.
It's a natural progression for ANY SoC of any uARCH.

And of course AMD is the king of IMC's now.... oh wait.

 

[frozentundra123456]

Again, more slides and projections, with no real data to prove software will use it, and if it does, how much the advantage will be. On top of that, more of the "hate amd" accusations toward anyone who refuses to accept the speculations without hard evidence.

It could be a great advance, or it could just be another idea that never takes off. No one knows.

 

[Yuriman]

Guys, layman question of the day:

- Won't this more complex memory management add latency?

That's what I was wondering.

 

[Olikan]

Guys, layman question of the day:

- Won't this more complex memory management add latency?

no... it's actually a gpgpu tecnology only, it will save latency and bandwidth in CPU-GPU comunication

for pure GPU or pure CPU work, we won't see any changes...

 

[ShintaiDK]

no... it's actually a gpgpu tecnology only, it will save latency and bandwidth in CPU-GPU comunication

for pure GPU or pure CPU work, we won't see any changes...

Thats not true. The cache coherency alone adds latency and takes up bandwidth. Its a simple trade off. You hope for greater benefit than the penalty.

 

[MisterMac]

no... it's actually a gpgpu tecnology only, it will save latency and bandwidth in CPU-GPU comunication

for pure GPU or pure CPU work, we won't see any changes...

I think his point is - you'll need some transistor and logic to manage this.
Which could cause some penalties.


Altho i don't think the penalty will be anything noticeable or worth talking about.

 

[ShintaiDK]

I just wish AMD actually finished the HSA specs. Rather than these powerpoint slides once every 3 months or so. Without the spec finished HSA is not going anywhere in any area. So far AMD delivered as much as BitBoys.

 

[BrightCandle]

Ever since they announced this it was apparent they were going to do it this way. I don't really see this as news, I want the hardware not the sales pitch C 2.0.

But I don't think this is the reason why using GPUs as coprocessors hasn't taken off yet. I think choosing the hacked about C language as the input without defining some form of machine code was a mistake, it makes targeting other languages to it very difficult. You can't just run C code unmodified, you can't compile something on another VM and convert it you have to write their very weirdly done C code and nothing else works very well. Putting out C code is just awkward especially considering what it looks like to program these devices.

Very few people work that way now. We want to write algorithms using modern concurrency tools and languages and have it translate to the GPU even if it costs us a bit of performance. So I don't think this technology will take off until it can run x86 code and we can retarget a thread with a simple bit of hinting to the OS and the compiler (which will have to presumably produce non AES/SSE code for the simple core).

 

[Olikan]

Thats not true. The cache coherency alone adds latency and takes up bandwidth. Its a simple trade off. You hope for greater benefit than the penalty.

not sure.... the CPU and the GPU still have it's own caches, and they probably can acess them without problems...
the only problem that i can see, is when the GPU acess the CPU cache...when the CPU is cache bound

 

[ShintaiDK]

not sure.... the CPU and the GPU still have it's own caches, and they probably can acess them without problems...
the only problem that i can see, is when the GPU acess the CPU cache...when the CPU is cache bound

You need coherency. Just like multisocket systems.

One of the slides also shows this.

 

[Abwx]

There is a reason why they released Richard. Kaveri is not ready for 2013. It would be much more stupid to release to different kind of APUs in one year.

Still with your viral marketing.??.

They paved the way at CES , for Richland as well as for Kaveri.
You may be the only one that didnt noticed it , voluntarly i presume ?...

http://www.clubic.com/salon-informa..._plus_en_avant_richland_et_kaveri-534700.html

 

[Ibra]

Meanwhile at Nvidia's headquarters.

http://s16.postimg.org/8dzyvtitx/obama.jpg

What's next? Heterogeneous visualization to transfer video from GPU to monitor?

1) Thread crapping will not be tolerated. Since you've amassed so many points, please enjoy this complementary vacation
2) This isn't 4Chan. Knock it off with the stupid memes.
-ViRGE

 

[parvadomus]

This will add exactly the same latency that is added when you add aditional cores to a cpu die.

 

[inf64]

It could be a great advance, or it could just be another idea that never takes off. No one knows.

Are you aware that all of their post 2013 products will be based around this very capability? It's not a matter of if at all, just when. HSA is the next big thing when it comes to how CPU and GPU are integrated and how they communicate in a single chip. It eliminates all sorts of bottlenecks while providing means for easier programming model. Kaveri is just first (r second if you count PS4's chip) in the line. EX core will bring even more capability:

 

[Abwx]

Meanwhile at Nvidia's headquarters.

What's next? Heterogeneous visualization to transfer video from GPU to monitor?

Apparently at Nvidia it is photoshoping.....

 

[USER8000]

Meanwhile at Nvidia's headquarters.

http://s16.postimg.org/8dzyvtitx/obama.jpg

What's next? Heterogeneous visualization to transfer video from GPU to monitor?

This isn't 4Chan. Knock it off
-ViRGE

You do realise,that the PS4 uses stacked GDDR5 right?? AMD are working together with Amkor.

Edit!!

Here is a picture from 2011 of a prototype test board to test the stacking(not a PS4 chip):

http://semiaccurate.com/2011/10/27/amd-far-future-prototype-gpu-pictured/

http://oi42.tinypic.com/2djyk38.jpg

http://sites.amd.com/us/Documents/TFE2011_006HYN.pdf

 

[Olikan]

You need coherency. Just like multisocket systems.

One of the slides also shows this.

i re-read the slides...yeah, i got it wrong....it's an UMA concept, not NUMA