Maybe I'm missing something, but it seems to me that GDDR5X could conceivably be used to save power and die space compared to standard GDDR5 (even if it doesn't do so to as great an extent as HBM does).
Having a wider memory controller means a bigger die, and more power consumption if all else is equal. In AMD's case, there is also the issue that on newer cards its memory controllers are being run at much higher clocks than they were originally designed for (~1250 -> 1500 MHz), thus hurting power consumption worse. But the memory controllers in Nvidia's Maxwell don't seem to have that issue, which indicates that a high-speed GDDR5 memory controller doesn't have to be inefficient if it is designed that way from the ground up.
Based on the descriptions so far, it looks like GDDR5X doubles bandwidth by various optimization tricks, not by running a higher raw clock. Therefore, 10 Gbps GDDR5X should run at the same (1250 MHz) base clock as 5 Gbps standard GDDR5, and hopefully the memory controller should use no more power. That means that the manufacturers can get away with a narrower memory bus than they're using now.
For instance, the GTX 980 has a 256-bit bus with 7.012 Gbps GDDR5. This provides memory bandwidth of 224 GB/sec. Assume that only the low-end versions of GDDR5X (10 Gbps) are available at first. A hypothetical GTX 980 successor with GDDR5X could then cut the bus width to 192 MHz, and actually see an increase in memory bandwidth:
224 * (192/256) * (10000/7012) = ~239.5