Originally posted by: THUGSROOK
NanoMem ~ you are confused - we are in jumper free mode this time
all you have to do enable the correct dipswitch on your board to get the 3:4 (or 4:5) ratio in jumper free mode. there are ZERO limitations this time - all bios functions work perfectly.
I know that this trick is being achieved with Jumper Free Mode i.e. jumper "JEN" left at its factory default setting of pins 1-2 jumpered! You're just misunderstanding my statement/question. What I was trying to get from you is the actual cpu:ram ratio response for those two DSW1 settings in Jumper Free mode...
Again if you go back to my post above you will notice that even though the last switch 6 on DSW1 is activated the frequency readings off DSW1 are actually less than 133MHZ. In fact they should be
120 and 125MHZ (make sure to scroll down to see the table of values) respectively which puts them below the 133 MHZ line even though switch 6 is in use.
Switch 6 is not exactly "undocumented" as it serves to set values for the external CPU bus frequencies when Jumper Mode is enabled which also causes the BIOS cpu clock values to be ignored at the same time. But it appears based on this thread that in Jumper Free Mode, this switch is having an impact on overclocking RAM through an implicit ratio increase while the CPU is still receiving its external bus clock values from the BIOS. RAM is also still receiving the same BIOS clock settings as the CPU i.e. from the BIOS but with a different ratio when switch 6 is flipped around.
I have observed that on the P4B533 line of boards that in general the purpose of this last switch, whether number 5 (P4B533V, -VM or -M) or number 6 (P4B533 or -E) is to cross above 133 system bus frequencies. If you take the time to sift through the DSW1 tables of all these boards you will note that P4B533 & P4B533-E have the two exceptions to this argument as I am still inquiring about them from my first post above.
Answers to my problem should shed some light in determining whether this is a hardware bug in the RAM bus lines such as a possible limitation in the external clock generator, its trace lines to RAM or the RAM clock multiplier that Asus can't circumvent. In this case we can rest assured that it won't be fixed and we can happily live with it as long we own the boards. Otherwise, this might also be a simple BIOS code bug where the BIOS cpu:ram ratio is ignored if the last switch is activated and in this scenario, Asus could easily rectify it with a future release, taking away the benefits of such "nice bug".
Btw, I am also curious if this works at any BIOS version for all the boards. Might consider adding BIOS level info indicating when trick works or not.
Peace