*edit 2 He just updated here: https://www.reddit.com/r/Amd/comments/6p2k6f/rx_vega_at_pdxlan_30_72317/dkmgnus/
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Here is some video of the Vega demo @PDXLAN
*edit It was recorded last night, so, sometime today, we should know the reveal.
Hi Elmy here. It was the one on the right. Just announced it. It was the one I thought it was. When first glance I thought it was the left but after playing on them I changed to the one on the right.
? Why doesnt it? As cas latency is specfied in cycles it goes to reason that the more cycles you have per second the lesser your total latency will be. Or am I reading the dispute incorrectly?You're just making a fool of yourself. You stated higher clocks means less latency. That's one of the most unintelligent technical comment I've seen on this forum in a while.
Higher clocks do NOT = less latency. Your back tracking on the issue is laughable.
It's an argument of generalization versus absolutes. Higher clocks does not guarantee lower latency.? Why doesnt it? As cas latency is specfied in cycles it goes to reason that the more cycles you have per second the lesser your total latency will be. Or am I reading the dispute incorrectly?
Back tracking? Cute. I did no such thing. Faster clockspeeds means lower latency assuming the cycle count is equal. That's just fact.You're just making a fool of yourself. You stated higher clocks means less latency. That's one of the most unintelligent technical comment I've seen on this forum in a while.
Higher clocks do NOT = less latency. Your back tracking on the issue is laughable.
Back tracking? Cute. I did no such thing. Faster clockspeeds means lower latency assuming the cycle count is equal. That's just fact.
I dont understand what there is to be a dispute over, its pretty simple math in context of some very real physical properties; higher clocks give lesser latency within the same specs - on a wire where electrons travel at a very fixed speed thus there is physical boundries to what latency you can achieve... Done. No more dispute. .It's an argument of generalization versus absolutes. Higher clocks does not guarantee lower latency.
True, however, not sure HBM is the answer there either.
They built the new cache controller to speed up operations, so, it is possible they will switch to something like eDRAM.
OEMs are not likely going to pay a premium just for having a HBM package.
It all boils down to cost.
They do think HBM is the way to go, that is pretty obvious.If that's the case then explain why they are spending so much developing HBM? Not just the actual physical cost of development but the cost in not pursuing current lower cost and more easily available tech. They're just going all in on HBM. And since they are the company most able to leverage high performance APU's due to their graphics and X86 IP who is going to usurp them by going in a different direction? Sure, nVidia is leveraging current tech better for gaming but they can't compete with AMD and Intel on the CPU front. And Intel lacks the graphics IP and expertise to compete with AMD/RTG.
Speaking of console wins, I am sure you noticed that none of the players want HBM, and that is clearly for costs reasons.I'll add that this has all come about due to the console wins. Another "cost" they ate to get to where they want to be.
They do think HBM is the way to go, that is pretty obvious.
That doesn't mean it made fiscal sense before, with the Fury line, or now with the Vega line. They didn't go with a tiered approach like nvidia, "pro" end gets HBM and they can make lots of profit, and a consumer range where they can use the much cheaper GDDR5/X.
They seem to be playing very long term, and will eat the costs.
Speaking of console wins, I am sure you noticed that none of the players want HBM, and that is clearly for costs reasons.
That delta is just too high for what you get.
There are not enough fabs mass producing HBM yet to make sense for any major player.
Once the cost of HBM goes lower than competing tech, then you will see it making more sense to be using HBM instead of other memory technologies, but right now, there isn't any huge advantage, and only a huge tech challenge both to make & implement.
On AMD? Nothing that I can see, as you mentioned, it doesn't seem like they can afford looking at other tech.What does that have to do with the post you replied to though? Who is going to usurp HBM on APU's from AMD? Or do you predict they'll simply fail to achieve their goal? Because, considering what they've done so far moving the industry where they want it with no money I only see it getting easier from here on out.
Perhaps taking the time to explain what you mean rather than insult would go down better no?Just stop talking. Higher clocks do not mean lower latency. That's total crap.
High clocks doesn't equal low latency, because high clocks typically improves throughput only, doesn't improve latency, and actually usually make it worse.
On AMD? Nothing that I can see, as you mentioned, it doesn't seem like they can afford looking at other tech.
This is getting to be a bit off topic with the newer tech, so I'll stop here, and swing it back to the PDXLAN Vega RX stunt.From the other players? That is a good question, there is newer tech coming in the pipeline.
If Intel starts using their MCDRAM (proprietary of course) on processors other than the Xeon Phi, that could very well bring a game changer for them in the desktop space.
Other companies are looking at HMC, STT-MRAM, and I forgot the other one, but, as I mentioned, everything comes down to cost.
AMD is paying Hynix for the HBM2 memory, then they must ship that to UMC for the front-end TSV work, and then ship that to ASE which does the backend assembly services, then ship back to GloFlo for testing and other stuff.
There are quite a few failure points there, not to mention extra costs, which is why Vega can't be cheap, and I bet is one of their most expensive GPUs yet.
As was previously mentioned, they are indeed doing the bulldozer type of "blind" tests, and this irks people for no good reason.
If you compare Vega RX to another unreleased product, Threadripper, the difference & direction is pretty much opposite.
On one hand we know the full specs of Threadripper, we know core counts, we even know price. They didn't do "blind" tests with Threadripper, since they knew they had a winning product, and no need to play such games.
On the other hand, Vega RX is cloaked in crazy marketing schemes, no solid information if you want to believe it doesn't have the same specs as the FE, and telling people @PDXLAN that they can't release any information on a unreleased product is untrue--look at Threadripper again.
So, if you are showcasing one unreleased product, yet using smoke & mirrors on the other, what does AMD expect people to think?
They do think HBM is the way to go, that is pretty obvious.
That doesn't mean it made fiscal sense before, with the Fury line, or now with the Vega line. They didn't go with a tiered approach like nvidia, "pro" end gets HBM and they can make lots of profit, and a consumer range where they can use the much cheaper GDDR5/X.
They seem to be playing very long term, and will eat the costs.
Speaking of console wins, I am sure you noticed that none of the players want HBM, and that is clearly for costs reasons.
That delta is just too high for what you get.
There are not enough fabs mass producing HBM yet to make sense for any major player.
Once the cost of HBM goes lower than competing tech, then you will see it making more sense to be using HBM instead of other memory technologies, but right now, there isn't any huge advantage, and only a huge tech challenge both to make & implement.
That's completely wrong. Everything else being equal, higher clocks will lower latency. It's the things we do to attain high clocks in the first place, like loosening timings, that can drive up latency.
Again everything will not be equal, increasing clocks will come at the expense of increasing latency. That's how RAM is designed.That's completely wrong. Everything else being equal, higher clocks will lower latency. It's the things we do to attain high clocks in the first place, like loosening timings, that can drive up latency.
RX Vega has been teased and announced years before TR, and yet we don't know anything about it 7 days before launch. TR is announced like 3 months ago? and yet we have videos of Lisa Su herself testing TR against i9 7900X in Cinebench, with hard numbers and open testing policy. NONE of that happened with RX Vega. Or even Vega FE, which had another blind test vs the TitanXp to obscure it's bad gaming performance. All of this doesn't inspire any confidence in the RX Vega.Difference is that Threadripper has been formally announced from AMD, stating prices and availability.
RX Vega has not.
On AMD? Nothing that I can see, as you mentioned, it doesn't seem like they can afford looking at other tech.
This is getting to be a bit off topic with the newer tech, so I'll stop here, and swing it back to the PDXLAN Vega RX stunt.From the other players? That is a good question, there is newer tech coming in the pipeline.
If Intel starts using their MCDRAM (proprietary of course) on processors other than the Xeon Phi, that could very well bring a game changer for them in the desktop space.
Other companies are looking at HMC, STT-MRAM, and I forgot the other one, but, as I mentioned, everything comes down to cost.
AMD is paying Hynix for the HBM2 memory, then they must ship that to UMC for the front-end TSV work, and then ship that to ASE which does the backend assembly services, then ship back to GloFlo for testing and other stuff.
There are quite a few failure points there, not to mention extra costs, which is why Vega can't be cheap, and I bet is one of their most expensive GPUs yet.
As was previously mentioned, they are indeed doing the bulldozer type of "blind" tests, and this irks people for no good reason.
If you compare Vega RX to another unreleased product, Threadripper, the difference & direction is pretty much opposite.
On one hand we know the full specs of Threadripper, we know core counts, we even know price. They didn't do "blind" tests with Threadripper, since they knew they had a winning product, and no need to play such games.
On the other hand, Vega RX is cloaked in crazy marketing schemes, no solid information if you want to believe it doesn't have the same specs as the FE, and telling people @PDXLAN that they can't release any information on a unreleased product is untrue--look at Threadripper again.
So, if you are showcasing one unreleased product, yet using smoke & mirrors on the other, what does AMD expect people to think?
HBM1 was a first generation beta test of the idea more or less. HBM2's latency in nanoseconds should be equal or lower, unless they shot up access latencies through the roof to bring it to that clock speed. I can't find specifications but I could have sworn I've seen some somewhere.Except with memory not everything else is equal. What fellow forum member was trying to say is:
1) To rise memory clocks AMD had to give up access latency
2) Rising access latency is usually somewhat compensated by increased bandwidth ( think GDDR5 -> GDDR5X, DDR3 -> DDR4 ), but in this case AMD also cut the bus in half, so their chip has to eat full price of increased latencies, without corresponding increase in bandwidth.
And no, rising 500->900+ memory clocks does not come for free in power and latency (and price?).
You can have higher access latencies in cycles, but due to increase in clocks end up having lower latencies in nanoseconds.
But the bottom line is faster performance or you wouldn't do it.
People are arguing semantics. Sure you can run tighter timings at lower clocks. So "technically" you add latency, as in loosen timings, as you increase clocks. But the bottom line is faster performance or you wouldn't do it.