Vega/Navi Rumors (Updated)

[Glo.]

I've seen other posters here claiming this. Why is this a problem?

If that bandwidth [512GB/s] is sufficient then we would expect the memory to clock at the lowest speed needed for power savings. Seeing that 8GB stacks are not available, then 4 x 4GB appears to be the only way to get 16GB onboard. Just run the memory at [1.0 Gbps speed/pin] to satisfy the bandwidth needs and minimize power consumption.

We want 16GB memory onboard.
4 x 4GB stacks is the only way at present to achieve this.
We do not need more than 512GB/s to extract maximum performance.

Answer is 4 x 4GB HBM2 stacks operating at 1.0 Gbps/pin

Another possibility is that Vega has 2048 Bit memory controller. Which fairs pretty in line with Rumored specification of Greenland APU

Two stacks of HBM2 will give 512 GB/s, at 2048 bit memory bus.

I don't know about you people, but more and more things from silicon design level are starting to be more logical.

And remember, Vega is the graphics architecture that will go into Zen APUs.

 

[Arachnotronic]

Fury Nano is as fast or faster than GTX 980Ti in DX-12 games (1440p and higher) at 175W TDP vs 250W TDP for vanila GTX 980Ti 1000MHz base/1075MHz turbo (according to NVIDIA site). At a card size smaller than even 14/16nm GTX 1060/RX 480.

If VEGA 10 does have 4096 shaders (64CUs), that will be a small die at around ~330mm2. This one will only compete against GTX 1080. A 430-450mm2 die with HBM2 at 175W TDP could be the next Nano and will be able to compete against TITAN X Pascal.

Have we learned nothing from previous hype trains?

 

[antihelten]

Answer is 4 x 4GB HBM2 stacks operating at 1.0 Gbps/pin

Problem is that SK Hynix currently only sells HBM2 at 1.6 and 2.0 Gbps, and while AMD could probably downclock the 1.6 Gbps one to 1.0, why would they do that?

Two stacks of HBM2 will give 512 GB/s, at 2048 bit memory bus.

Two stacks of HBM2 would only be 8GB if we are talking 4Hi though, which is the only thing SK Hynix is currently selling.

 

[maddie]

Problem is that SK Hynix currently only sells HBM2 at 1.6 and 2.0 Gbps, and while AMD could probably downclock the 1.6 Gbps one to 1.0, why would they do that?



Two stacks of HBM2 would only be 8GB if we are talking 4Hi though, which is the only thing SK Hynix is currently selling.

IF you want 16GB memory, THEN you NEED [at present] 4 x4 GB.

IF 512GB/s is enough bandwidth, THEN you can use 1.0Gbps/pin.

The advantage is that you save power by not clocking to the maximum possible, which would be wasted anyhow as you can't utilize the additional bandwidth in any case.

I really don't see the conundrum.

 

[Sweepr]

New info/rumors, apparently from official roadmaps:

Vega 11

Like I said yesterday, full details of VEGA 11 were not yet disclosed. However, I did tell you that Polaris 10 will be replaced by Vega 11 next year. Of course, what I meant was the professional market. It does not mean there won’t be Polaris 10-based Radeons next year. It means that more powerful solutions will be offered in Radeon Pro series with VEGA GPU.

Vega 10

I decided to compile this chart for you to understand the differences between VEGA and Pascal. Like you can see Vega 10 has two stacks of HBM2 memory, hence 16GB configuration. However, it’s unclear if such configuration will be offered with Radeon RX series. Meanwhile dual Vega 10 will get 4 stacks of HBM2. This will also increase bandwidth from 512 GB/s to 1 TB/s.

http://videocardz.com/63715/amd-vega-and-navi-roadmap

Also confirms Vega 10 is the big chip, and it packs 4096 SPs (same as Fiji).

 

[antihelten]

IF you want 16GB memory, THEN you NEED [at present] 4 x4 GB.

IF 512GB/s is enough bandwidth, THEN you can use 1.0Gbps/pin.

The advantage is that you save power by not clocking to the maximum possible, which would be wasted anyhow as you can't utilize the additional bandwidth in any case.

I really don't see the conundrum.

Problem is that the reason SK Hynix doesn't offer 1.0 Gbps stack at the moment is because they don't have any stack validated to run at those speeds. So while you could probably downclock the 1.6 Gbps stack, those stacks probably wouldn't be able to run at as low of a voltage as proper 1.0 Gbps stack and as such your power savings would also be limited.

So the question is if it is really worth it for AMD to go with 4 stacks of 4Hi HBM2 downclocked to 1.0 Gbps, versus simply going with 3 stacks of 4Hi at 1.6 Gbps. The latter gives you 614.4 GB/s and 12 GB of VRAM whilst saving you in both validating the memory from running out of spec, saves you from including a extra stack on the interposer and finally saves you a bit of die space by cutting the on die part of the memory controller down from 4096 bit to 3072 bit, and the power usage probably wouldn't be all that different.

New info/rumors, apparently from official roadmaps:

Vega 11

Vega 10

http://videocardz.com/63715/amd-vega-and-navi-roadmap

Also confirms Vega 10 is the big chip, and it packs 4096 SPs (same as Fiji).

So this then confirms that he's talking about 8Hi HBM2 (2 stacks giving 16GB is only possible with with 8Hi), which would furthermore also confirm* that it's running at 2.0 Gbps.

*confirm as in confirm exactly what the rumour is talking about, not confirm as in it is now a fact that Vega 10 will use 2 Gbps 8Hi HBM2.

 

[maddie]

Another possibility is that Vega has 2048 Bit memory controller. Which fairs pretty in line with Rumored specification of Greenland APU

Two stacks of HBM2 will give 512 GB/s, at 2048 bit memory bus.

I don't know about you people, but more and more things from silicon design level are starting to be more logical.

And remember, Vega is the graphics architecture that will go into Zen APUs.

AFAIK, HBM stacks and memory controllers come paired. Meaning that you get 1 stack paired with 1 dedicated memory controller. A modular setup. The fact that we see a 2048 here, which is really 2 x 1024 bit memory controllers, is not that critical in my view. You can have any # of controllers and associated memory stacks from 1 to n. 2048 is NOT a magic #.

You have constraints in memory capacity, memory speed, total costs, power consumption and needed bandwidth. The designer has to balance all of these to his measure of optimum. One thing we know is that power use will be very important for AMD as they have explicitly stated this. This implies as low a clock as needed.

 

[maddie]

Problem is that the reason SK Hynix doesn't offer 1.0 Gbps stack at the moment is because they don't have any stack validated to run at those speeds. So while you could probably downclock the 1.6 Gbps stack, those stacks probably wouldn't be able to run at as low of a voltage as proper 1.0 Gbps stack and as such your power savings would also be limited.

So the question is if it is really worth it for AMD to go with 4 stacks of 4Hi HBM2 downclocked to 1.0 Gbps, versus simply going with 3 stacks of 4Hi at 1.6 Gbps. The latter gives you 614.4 GB/s and 12 GB of VRAM whilst saving you in both validating the memory from running out of spec, saves you from including a extra stack on the interposer and finally saves you a bit of die space by cutting the on die part of the memory controller down from 4096 bit to 3072 bit, and the power usage probably wouldn't be all that different.

All well and good, but my critical first line stated, [ IF you want 16GB memory, THEN you NEED [at present] 4 x4 GB. ].

I would not say that power saving would be limited as that, to me, suggests a small saving. You might be very close to the maximum power savings by downclocking the 1.6Gbps to 1.0Gbps. In any case, there will be a saving which would otherwise be wasted.

I have no idea what will happen, but I'm just pointing out what are some valid reasons for the rumored specs to be possible and that there might be some advantages.

Maybe it's as simple as wanting more memory than Nvidia so as to have a marketing advantage. Once you make that decision, then all the other variables start to resolve themselves.

 

[zinfamous]

New info/rumors, apparently from official roadmaps:

Vega 11



Vega 10



http://videocardz.com/63715/amd-vega-and-navi-roadmap

Also confirms Vega 10 is the big chip, and it packs 4096 SPs (same as Fiji).

This doesn't really confirm anything until AMD releases details. It's one thing to criticize fans of one color for jumping on the hype train, it's another to justify the hype train by adopting pure speculation as confirmation. Obviously this could be right in the end, but it's premature to call it confirmed.

 

[antihelten]

I would not say that power saving would be limited as that, to me, suggests a small saving. You might be very close to the maximum power savings by downclocking the 1.6Gbps to 1.0Gbps. In any case, there will be a saving which would otherwise be wasted.

Power scales linearly with frequency, but with the square of voltage, so the greatest gains comes from lowering voltage. That's not to say that they couldn't still save a fair bit of power by simply downclocking from 1.6Gbps to 1.0Gbps, just that it probably wouldn't be anywhere near as low as proper 1.0Gbps modules. If we assume the alternative is 3 stacks running at 1.6Gbps then the power savings might only be about 15% which would be roughly 5W.

Maybe it's as simple as wanting more memory than Nvidia so as to have a marketing advantage. Once you make that decision, then all the other variables start to resolve themselves.

That's certainly possible.

 

[Sweepr]

This doesn't really confirm anything until AMD releases details. It's one thing to criticize fans of one color for jumping on the hype train, it's another to justify the hype train by adopting pure speculation as confirmation.

I will trust WhyCry on this:

I don't know. The roadmap I posted is straight from AMD presentation for server GPUs. I would expect VEGA 10 to appear in Radeon RX first though.

Should be public in AMD presentations soon, maybe you accept it by then.

 

[AtenRa]

Have we learned nothing from previous hype trains?

GP104 (GTX 1080) is 300mm2, im saying a Vega 330mm2 will compete against it, where do you see the hype ??

 

[zinfamous]

I will trust WhyCry on this:



Should be public in AMD presentations soon, maybe you accept it by then.

I will, as should anyone else. You win no prizes in this game by being first to "confirm rumors," so it baffles me why it seems so important. The other issue raised is that the information from this source you pushed yesterday lead some (OK one) here to once again speculate that this could mean AMD is committing fraud (again!)--because the reported rumor would go against AMD's already public roadmaps. It's a very weird position to adopt as even possible. Seems the need to accept rumor as potentially true outstrips the need for real confirmation--again contributing to the hype trains that generate so much derision around here.

 

[maddie]

New info/rumors, apparently from official roadmaps:

Vega 11



Vega 10



http://videocardz.com/63715/amd-vega-and-navi-roadmap

Also confirms Vega 10 is the big chip, and it packs 4096 SPs (same as Fiji).

Any one else having problems with these "leaks". Clickbait?


Hawaii is still the premium HPC die for year 2017. AMD stated HPC as one of the markets targeted for growth in revenue yet they will waste the opportunity to use Vega 10. A probably much more power efficient die in a market that chases power efficiency.

Vega 20 is a die shrink of Vega 10, yet Vega 10 DP is 1/16 SP and Vega 20 DP is 1/2 SP.

Tooth fairy stuff? Interesting to see some swallowing it uncritically.

I personally would sweep all of it away and wait for more credible leaks/speculation.

 

[Sweepr]

The other issue raised is that the information from this source you pushed yesterday lead some (OK one) here to once again speculate that this could mean AMD is committing fraud (again!)--because the reported rumor would go against AMD's already public roadmaps.

If you haven't noticed VideoCardz mentioned new server roadmaps (probably the same Fudzilla saw), so obviously AMD should update their public roadmaps soon - hence no fraud.

Edit: there's the disclaimer in their roadmaps as well.

 

[zinfamous]

If you haven't noticed VideoCardz and Fudzilla mention new server roadmaps, so obviously AMD should update their public roadmaps soon - hence no fraud.

LoL. again AMD is accused of fraud because they aren't updating their public information to reflect the rumor mill. You guys are really reaching.

 

[Sweepr]

LoL. again AMD is accused of fraud because they aren't updating their public information to reflect the rumor mill. You guys are really reaching.

Please save us from your thread derail, a single poster mentioned 'fraud' here (under a specific circumstance that you ignored) and it wasn't me.

 

[AtenRa]

"AMD roadmaps are subject to change without notice or obligations to notify of changes"

 

[Arachnotronic]

LoL. again AMD is accused of fraud because they aren't updating their public information to reflect the rumor mill. You guys are really reaching.

Not accusing AMD of fraud, but if they don't update the roadmaps in their investor materials to reflect their internal roadmaps, then they are misleading investors. That is illegal.

 

[Arachnotronic]

"AMD roadmaps are subject to change without notice or obligations to notify of changes"

That is true, but if they update the investor presentation and say "this is our current roadmap" when it is not actually the roadmap, then there is a serious problem.

If they choose to simply pull the roadmap slide from the deck the next time they update it, that's perfectly fine.

 

[Headfoot]

If anyone has it in their head that the SEC is going after AMD, they're way way off

 

[Arachnotronic]

If anyone has it in their head that the SEC is going after AMD, they're way way off

Didn't say that the SEC is going after AMD. I am just saying that if AMD's roadmap has changed and management is aware of it, and then if AMD goes out and reiterates the old road map to investors, then that is likely a problem.

 

[AtenRa]

Since only AMD really knows if NAVI will be delayed or not, we will only learn it when AMD will update their roadmaps again

 

[zinfamous]

Since only AMD really knows if NAVI will be delayed or not, we will only learn it when AMD will update their roadmaps again

exactly. But we might as well lend enough credence to the current rumors so that we can suggest AMD might be teetering on this side of fraud if they don't do anything about it. There's really no point in suggesting the possibility at the same time you acknowledge that it's all fine and dandy once AMD updates the public information.

Come on, guys.

 

[zinfamous]

Please save us from your thread derail, a single poster mentioned 'fraud' here (under a specific circumstance that you ignored) and it wasn't me.

The only thing I'm trying to derail is the hype train. The rumor that you posted listed Vega as 1Q 2017 when AMD's most recent conference call scheduled it for 1H 2017.

I'm not sure how reiterating that the unconfirmed rumors you posted are still just rumors, is considered thread derailing? You think of me as a fanboy--but I see this information as relatively neutral, so I'm not talking about whether this information is good or bad for anyone.