@Silverforce and Mahigan, is there anything to actually say that GCN4 will resemble the system described in the patents, such as Linux checkins or similar? That seems like a pretty radical departure from the current architecture, and if they were introducing GPUs based on that within a few months you would think they would want cards in the hands of every dev out there now especially in the DX12 era.
By providing a set of execution resources within each GPU compute unit tailored to a range of execution profiles, the GPU can handle irregular workloads more efficiently. Current GPUs (for example, as shown in FIG. 3) only support a single uniform wavefront size (for example, logically supporting 64 thread wide vectors by piping threads through 16 thread wide vector units over four cycles). Vector units of varying widths (for example, as shown in FIG. 4) may be provided to service smaller wavefronts, such as by providing a four thread wide vector unit piped over four cycles to support a wavefront of 16 element vectors. In addition, a high-performance scalar unit may be used to execute critical threads within kernels faster than possible in existing vector pipelines, by executing the same opcodes as the vector units. Such a high performance scalar unit may, in certain instances, allow for a laggard thread (as described above) to be accelerated. By dynamically issuing wavefronts to the execution unit best suited for their size and performance needs, better performance and/or energy efficiency than existing GPU architectures may be obtained.
Fiji at 14nm and with better fron-end will be only tahiti size.Amd can pull hawaii size SKU with around 5120SP
So, with smaller wavefronts and higher occupancy, IPC and efficiency will be higher, latency and size will be smaller, as will throughput.
To achieve higher throughput AMD will need to multiply their shader engines which increases ROPs and geometry.
16nm plus this stuff is pretty exciting!
I think you all are forgetting that the scaler counts as one. The CU - 1 wide 1 wide 2 wide 4 wide and 8 wide. The scalers are 2 cycle high speed compared to the other alu that would make 64 cu = 1024 sp.
Tahiti size SKU is vega11 and that SKu will go against GP104.Vega 10 should go agains Big pascal.AMD could also make a 600mm2 8192 shader monster GPU on 14nm if they wanted to, but question is what makes sense from a business standpoint at this stage. If AMD can sell a ~300-350mm2 Vega 10 to people now, and then a 450-600mm2 GPU to the same people down the road, then obviously that is preferable to simply selling them the 450-600mm2 GPU from the beginning.
That seems like a pretty radical departure from the current architecture, and if they were introducing GPUs based on that within a few months you would think they would want cards in the hands of every dev out there now especially in the DX12 era.
It appears that 4 cu NewGCN = 1 cu OldGCN. OGCN has 4x16 ALU plus 1 scaler and associated registers. NGCN will be 4 x 8 ALU = 2 X 16 OGcn alu + 4 x 4 ALU NGCN = 1 X 16 OGCN + 4 x 2 NGCN = half of the last OGCN 1 x 16 + 4 X 1 additional scaler. It might be the same size even with power gating due to the space savings, it depends on how big a scaler is compared to 2 ALU.I'm also somewhat skeptical about any SP predictions based on previous generations. It's quite likely that in order to use this kind of arrangement where you can powergate groups of ALUs you would need additional transistors that increase the size of the CU, which means fewer total CUs relative to the older designs. Of course there's also the chance that they've made other optimizations to cut down on the transistors used or to lay them out better, but considering the major overhauls that they've already confirmed, it seems like that's something we'll see in future generations more than we will here.
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Tahiti size SKU is vega11 and that SKu will go against GP104.Vega 10 should go agains Big pascal.
To be honest GP104 and 106 looks like crap.
Gp106 with 128bit vs polaris 10 with 256bit 200mm2GP106 vs 232mm2 polaris
Gp104 with crap 256bit and DDR5 vs Vega11 with HBM2
AMd might come 6months late with vega, but they will win in this generation.Unless Nv pulls some miracle like again 20% IPC vs maxwell and miracle delta compression and 1.6Ghz stock boost.
I just cant wait for vega11-Tahiti size SKU(350mm2) HBM2 with 1TB/S.Same SP as Fiji, but with new architecture and front-end.That should crush Gp104 and it will be great Card.
Who said amd won't be at e3? I thought they'd continue to debut new gpus there for the average gamer. Especially when they're targeting the midrange market with PolarisSo AMD will not be on Computex and on E3. Interesting. Are they gonna show new GPUs on external event? WWDC? It is directly between them.
And appearance on that would make huge traction for them...
Would be a huge missed opportunity in my opinionThey aren't on the exhibitor list yet...
http://pr311jm731.mapyourshow.com/6_0/alphalist.cfm
I looked under "A" for AMD or Advanced Micro Devices, and under "T" and "R" for The Radeon Group. Nothing there...
It would be odd for them to miss it.
Would be a huge missed opportunity in my opinion
You think apple would let amd get a new product launch at their own keynote presentation?If they would announce the GPUs on Apple's WWDC keynote presentation it would make much more stir than anything before.
Well Raja Koduri already hinted what we can expect from Polaris. It's gonna be smaller than in the past and it's gonna be higher perf/$.