Dynamic Medium Grain Clock Gating
As discussed above, in conventional approaches, clocking of all SIMD units in a shader complex is either enabled or disabled simultaneously. In many applications, not all SIMDs are assigned work. However, conventional approaches continue to actively provide clocking signals to such SIMDs. This approach increases power consumption of a graphics processing unit and is inefficient. Conventional approaches can include static clock gating for shader complex blocks in which, when a request is initiated by a SPI, clocks of shader complex blocks are turned-on, one by one, with a di/dt (i.e., rate of change of current) avoidance count delay. Once started, the clocks keep clocking for the entire shader complex even if there is no work for many blocks inside the shader complex. In other words, only a few SIMDs are active at any given time. Once work is completed by the shader complex, the clocks are shut-off automatically using the di/dt avoidance count delay. Thus, in conventional approaches, clock gating is static in nature, and treats the shader complex as a single system.
In contrast to conventional approaches, embodiments of the invention achieve dynamic grain (e.g., dynamic medium grain) clock gating of individual SIMDs in a shader complex. Switching power is reduced by shutting down clock trees to unused logic, and by providing a clock on demand mechanism (e.g., a true clock on demand mechanism). In this way, clock gating can be enhanced to save switching power for a duration of time when SIMDs are idle (or assigned no work).
Embodiments of the present invention also include dynamic control of clocks to each SIMD in a shader complex. Each SIMD is treated as shader complex sub-system that manages its own clocks. Dynamic control for each block/tile in an SIMD is also provided. Clocking can start before actual work arrives at SIMDs and can stay enabled until all the work has been completed by the SIMDs.
Dynamic medium grain clock gating, according to the embodiments, causes negligible performance impact to the graphics processing unit. Embodiments of the present invention can also be used to control power of SIMDs by power gating switches and thus save leakage power of SIMDs.