[VR-Zone]AMD upcoming Tonga GPU to be released in mid August

[raghu78]

There is only two GPUs for Volcanic Islands.

Tonga and Iceland.

Maui is the dual GPU implementation of Tonga or the Logic + Logic + Memory version of it. AMD is heavily abusing the 2.5D TSV interposer to max out yields on 20-nm.

Note: Maui is a codename related to not an island but a myth.
http://en.wikipedia.org/wiki/Māui_(mythology)

Seronx if Tonga is a replacement for Hawaii I don't see it as the ultra high end R9 390X. Further more I am of the opinion that AMD will use HBM on their next gen single GPU flagship and dual GPU flagship , just like when AMD used GDDR5 on HD 4870 and HD 4870 X2.

It makes sense for AMD to use HBM on a 4096 GCN 2.0 part with 64 ROPs and 4 stack 4 Hi HBM with a bandwidth of 512 GB/s. I don't see AMD using anything but HBM on the ultra high end R9 390X. I also think the likelihood of such a product being built at GF 20LPM is quite high.

 

[Medu]

Seronx if Tonga is a replacement for Hawaii I don't see it as the ultra high end R9 390X. Further more I am of the opinion that AMD will use HBM on their next gen single GPU flagship and dual GPU flagship , just like when AMD used GDDR5 on HD 4870 and HD 4870 X2.

It makes sense for AMD to use HBM on a 4096 GCN 2.0 part with 64 ROPs and 4 stack 4 Hi HBM with a bandwidth of 512 GB/s. I don't see AMD using anything but HBM on the ultra high end R9 390X. I also think the likelihood of such a product being built at GF 20LPM is quite high.

There is a reason that Intel, who have far more resources than AMD, don't make large architecture changes when they are changing nodes - it is because it reduces the chances of something going wrong.

AMD have a history of doing both ways-

AMD moved to 55nm with the 3870, which was a very small chip based on a current design(2900XT).
AMD moved to 40nm with the 4770, which was less complex than what they already had on the market.
AMD moved to 28nm with the 7970. They did both here and struggled with yields for months(probably TSMC fault though).

However you believe they should move to a new node, a refined architecture as well as transition to completely new memory bus architecture all in one step... very risky.

Also the move to HBM is probably for their APU. Improving the bandwidth for the same power usage is very important in an APU as they are bandwidth limited so it's not just something AMD want to use on their high end chips - it will be more useful in mobile chips.

 

[darkserpent]

http://i.imgur.com/ABzFRth.jpg

Graphics Processor Tapeouts
>500sq.mm@28HPM,1GHz
>350sq.mm@28HPM,1GHz

http://www.synapse-da.com/Corporate/Clients

Synapse Design
Clients:AMD

 

[SAAA]

Over 500 mm^2 and still on 28nm, this node is endless... So 500/438 = 15% minimum possible eyeballed improvement, at 1GHz constant or turbo? What about the stacked memory, too late to implement?

 

[Cloudfire777]

http://i.imgur.com/ABzFRth.jpg

Graphics Processor Tapeouts
>500sq.mm@28HPM,1GHz
>350sq.mm@28HPM,1GHz

http://www.synapse-da.com/Corporate/Clients

Synapse Design
Clients:AMD

Holy schmoly that is very interesting.
What does Synapse do? What have they done for AMD since clearly that is AMD tapeouts because no other clients of theirs do graphics of that size?

EDIT: Thats HBM isnt it? 50+ Blocks 1GHz. 28nm HPM module and everything

 

[darkserpent]

"What does Synapse do? "

on Homepage
"with ASIC design services that include RTL design, design verification and physical design for digital and analog/mixed signal semiconductors"


This is the one of 33 Tapeouts in the past 12months.
This products will target 2H2014>1H2015,will not have HBM.

"What have they done for AMD since clearly that is AMD tapeouts because no other clients of theirs do graphics of that size?"

Yes.

 

[f1sherman]

I can't say about Tonga. But it makes sense for AMD to introduce HBM at the ultra high end where it can command high margins and the memory bandwidth is badly needed. You should remember AMD introduced GDDR5 on the HD 4870 and then HD 4870X2 which were the top of the HD 4000 product stack. GDDR5 across the product stack did not make it till HD 5000 series almost 18 months later. It makes the worst sense to introduce cutting edge memory tech to entry level models which can be easily served by GDDR5 and without the extra cost of 2.5D silicon interposer.

The card you are looking for is beforementioned HD4770

So both 40nm and DDR5 were introduced on 137mm2 RV740

 

[Cloudfire777]

"What does Synapse do? "

on Homepage
"with ASIC design services that include RTL design, design verification and physical design for digital and analog/mixed signal semiconductors


This is the one of 33 Tapeouts in the past 12months.
This products will target 2H2014>1H2015,will not have HBM.

"What have they done for AMD since clearly that is AMD tapeouts because no other clients of theirs do graphics of that size?"

Yes.

Still doesnt explain exactly what they have doe for AMD.
Was it verifications? Did they design something for AMD?

If it isnt HBM, then its not so interesting really. 350&500mm2 GPUs is nothing out of the ordinary. But we atleast have confirmed its 28nm HPM built by GloFo

 

[Erenhardt]

GPU from GF? Also, I've heard (sushi?) that next amd flagship will be big core but didn't expected 500+mm

 

[Skurge]

The card you are looking for is beforementioned HD4770

So both 40nm and DDR5 were introduced on 137mm2 RV740

http://www.anandtech.com/show/2556

nope it was 4870. I had one of those.

 

[raghu78]

The card you are looking for is beforementioned HD4770

So both 40nm and DDR5 were introduced on 137mm2 RV740

you are wrong. as pointed out HD 4870 was first to GDDR5 in Jun 2008. 4770 was Apr 2009. refresh your memory with anandtech

http://www.anandtech.com/show/2556

http://www.anandtech.com/show/2756

 

[f1sherman]

riiight...HD4770 being 40nm got me confused.

4770 did great against 4850 with half its size and less of everything.

 

[StereoPixel]

>350mm - Tonga, >500mm - Maui?

 

[pTmdfx]

Still doesnt explain exactly what they have doe for AMD.
Was it verifications? Did they design something for AMD?

Simply outsourced design projects in any areas, probably except the core IP of AMD. There are a plenty of outsourcing vendors/contractors like them.

 

[Wild Thing]

http://i.imgur.com/ABzFRth.jpg

Graphics Processor Tapeouts
>500sq.mm@28HPM,1GHz
>350sq.mm@28HPM,1GHz

http://www.synapse-da.com/Corporate/Clients

Synapse Design
Clients:AMD

Nice find there Snake...lots of revised speculation after that 500mm stat I suspect...
Welcome to VC&G forums!

 

[ShintaiDK]

If they just had a tapeout, then its already a 2015 product. Seems 28nm will be forever for dGPUs.

 

[NostaSeronx]

You know what would be really trolly is if AMD's 20-nm line up is on 20-nm SHP.

 

[3DVagabond]

You know what would be really trolly is if AMD's 20-nm line up is on 20-nm SHP.

Who's process is that and is it ready?

 

[NostaSeronx]

Who's process is that and is it ready?

GlobalFoundries;
http://www.brightsideofnews.com/Dat...-wafers-by-2015/GlobalFoundries_28nm_20nm.jpg
http://eda360insider.files.wordpress.com/2011/09/globalfoundries-20nm-speed-increase.jpg

20-nm SHP is Gate First, ~0.49x shrink from 28-nm SHP.
20-nm LPM is Gate Last, ~0.6x shrink from 28-nm HPP.

Speculatively;
28-nm SHP -> 2.41 billion transistors = 245 mm²
Then in 20-nm SHP; 2.41 billion transistors = 120 mm²

28-nm SHP -> 2.41 billion transistors = 245 mm²
Then in 28-nm HPP; 2.41 billion transistors = 294 mm²
Then in 20-nm LPM; 2.41 billion transistors = 176 mm²

32-nm SHP = 0.49x shrink = 28-nm SHP = 0.49x shrink = 20-nm SHP
40-nm HP = 0.49x shrink = 28-nm HPP = 0.6x shrink = 20-nm LPM* = 0.85x shrink = 14-nm LPP*

*If to skip 20-nm LPM to 14-nm LPP the outcome would be a 0.51x shrink from HPP.

I've been told 20-nm SHP will be in production and account for profits by Q4 2014.
http://www.advancedsubstratenews.com/wp-content/uploads/2013/07/GF1.jpg

Someone needs to make this less confusing!