VR-Zone article on Intel Haswell server CPUs - DDR4 and higher TDPs

[Edrick]

I'll say 40% less power is a concern for datacenters with TB of RAM for in-memory databases, etc. but maybe it's just me

40% less power for just the RAM, which is a very small percentage to begin with compared to CPUs/GPUs and HDDs. While I agree that DDR4 is something to look forward to, I just don't see "power savings" being a selling point to data centers.

 

[Edrick]

Because you wrote "DDR4 is not going to happen for Haswell. Period." when there is a lot of talk about DDR4 for Haswell-EX since around IDF Spring, it looked much like if you ignored that it is more or less considered a given already so I mentioned it

The article only mentions Haswell-EP. I responded to the article saying Haswell will not have DDR4. The EP and EX are very different lines (different sockets). With Haswell-EX slated for Q4 2014, I guess there is a small chance it will have DDR4. With that said, to avoid confusion with my post, I will rephrase it:

Haswell-E, Haswell-EP, and Haswell (desktop/mainstream) will not support DDR4.

 

[Ajay]

Well, Intel will really be pushing AVX2 for compute, with Haswell, so a 16-core doesn't surprise me all that much.

I am curious, has a nominal DDR4 JEDEC voltage been determined yet? Since DDR3 is 1.5v, but we've seen anywhere from 1.25 to 1.7, maybe even 1.8.

http://www.jedec.org/category/technology-focus-area/main-memory-ddr3-ddr4-sdram

So it looks like 1.2v to start.


AFAIK, DDR4 is needed to make maximum use of TSX, so I'd imagine it's more imperative to get it on servers first. There probably is no significant increase in risk, just a requirement for longer more exhaustive validation.

 

[BenchPress]

AFAIK, DDR4 is needed to make maximum use of TSX, so I'd imagine it's more imperative to get it on servers first.

TSX has nothing to do with DDR4. It's about transactions between cache memory. And servers don't have much use for TSX; it mainly helps single applications using many cores. Servers run many processes which don't have to actively share things.

 

[exar333]

40% less power for just the RAM, which is a very small percentage to begin with compared to CPUs/GPUs and HDDs. While I agree that DDR4 is something to look forward to, I just don't see "power savings" being a selling point to data centers.

When you are dealing with a lot of DIMMs, the power use definitely is important. From the 2008 Intel chart, DDR uses between 15-20% of total power. Cutting that by 40% could be potentially huge.

http://www.infoq.com/articles/power-consumption-servers

 

[ShintaiDK]

I think we can all agree DDR4 is nice. But besides for IGPs it doesnt really matter much.

Even some of the oldish servers with somewhat early 144GB DDR3 doesnt really use that much power on memory. And just look on Samsungs 30nm DDR3. Kinda hard to save from there.

For me DDR4 is about IGP and density. Not power or CPU performance, that died out with DDR3.

 

[Ajay]

TSX has nothing to do with DDR4. It's about transactions between cache memory. And servers don't have much use for TSX; it mainly helps single applications using many cores. Servers run many processes which don't have to actively share things.

Servers don't have much use for TSX, your joking right? I could be wrong about DDR4 & TSX, I read an article that said they were synergistic - since I can't find that art. right now, I'm not 100% sure. But server apps will be bigger users of TSX than desktops. Heck, even high performance embedded apps are heavily multi-threaded, wish I had TSX when I was developing network switching firmware.

 

[Cerb]

TSX has nothing to do with DDR4. It's about transactions between cache memory. And servers don't have much use for TSX; it mainly helps single applications using many cores. Servers run many processes which don't have to actively share things.

Did you forget about databases? They're sharing things within a process all the time, and get into mires of locks. DDR4 still won't help more than a bigger L3, though.

 

[cytg111]

If this information is true, I cannot WAIT for Haswell-E. Again, if true, this will probably be the most 'different' we have ever seen between a consumer CPU and 'enthusiast' CPU. Low TDP + IGP vs. high TDP no IGP server-type CPU. Could not be any happier!

Agreed, may just be worth the wait.. the mandatory igp have always bothered me. I see a haswell 'server' type cpu in my future.. mmmmmm...

 

[bigsnyder]

I realize desktop DDR is not the same as video card DDR (GDDR), but the video card makers pretty much skipped DDR4. Don't ever remember any noticeable performance increase with the few cards that offered it, now DDR5 is a different story.

 

[soccerballtux]

I realize desktop DDR is not the same as video card DDR (GDDR), but the video card makers pretty much skipped DDR4. Don't ever remember any noticeable performance increase with the few cards that offered it, now DDR5 is a different story.

something about the spec not being finalized for some dumb reason

 

[X98]

dat ddr4

 

[Homeles]

That picture of Haswell isn't actually Haswell -- it's a GT3 Ivy Bridge quad core.

 

[kernelc]

I realize desktop DDR is not the same as video card DDR (GDDR), but the video card makers pretty much skipped DDR4. Don't ever remember any noticeable performance increase with the few cards that offered it, now DDR5 is a different story.

Hi,
the naming confusion between DDR and GDDR is quite annoying.

GDDR3 was based on DDR2 technology, as it used the same 4-bit prefetch. However, GDDR3 included some improvements that helped clock scaling.

GDDR4 are based on DDR3 technology, using 8-bit prefetch. So, on a DDR generational level, we can say that GDDR4 and DDR3 are on the same level somewhat.

GDDR5 are also based on DDR3 technology but they had a 2x wider internal bus to memory banks compared to GDDR4. This enable GDDR5 to offer twice the bandwidth compared to GDDR4.

DDR4 are also based on 8-bit prefetch, but they indroduce various desing change that allow them to double DDR3 bandwidth.

Regards.

 

[BenchPress]

Did you forget about databases? They're sharing things within a process all the time, and get into mires of locks. DDR4 still won't help more than a bigger L3, though.

You're right, databases with small transactions and high write contention should benefit from TSX. Especially for a 16-core / 32-thread CPU that wouldn't be an exceptional situation.

I was only thinking about services with mostly independent data. And the typical use case of TSX for the desktop would be quite different. Multiple threads will be used to do one complex task faster by splitting it into sub-tasks, whereas for a database otherwise independent tasks (code wise) will all share the same data.

Interestingly that's mainly a semantic difference and the same TSX technology will be useful for a wide range of multi-threaded applications, regardless of whether the focus is on synchronizing tasks or synchronizing data.

 

[Olikan]

DDR4 are also based on 8-bit prefetch, but they indroduce various desing change that allow them to double DDR3 bandwidth.

that!

i am more interested about DDR4, because the future Gddr6 looks to be very promissing...

 

[BenchPress]

That picture of Haswell isn't actually Haswell -- it's a GT3 Ivy Bridge quad core.

Isn't it simply a quad-core Ivy Bridge with an HD 4000? The GT1/GT2/GT3 names are reserved for Haswell, and GT3 is supposed to be twice as big as an HD 4000.

And it could just be a Haswell GT2 prototype then. No?

 

[ShintaiDK]

The Haswell picture with VRM at IDF is real. Haswell is bigger than Ivy.

 

[Edrick]

Is that die size increase due to a larger iGPU, or is it due to the "rumored" dedicated L4$ for the iGPU?

 

[Homeles]

Isn't it simply a quad-core Ivy Bridge with an HD 4000? The GT1/GT2/GT3 names are reserved for Haswell, and GT3 is supposed to be twice as big as an HD 4000.

And it could just be a Haswell GT2 prototype then. No?

The Haswell picture with VRM at IDF is real. Haswell is bigger than Ivy.

http://www.chip-architect.com/news/2012_04_19_Ivy_Bridges_GPU_2-25_times_Sandys.html

 

[ShintaiDK]

Hans de Vries? The guy that jumped the Dulldozer train among other things? Sorry he got zero creditbility left. Cant be bothered with whatever he writes.

He jumped into the JF-AMD stream and lost his ways like a few others.

And one thing we know, Intel havent done any BS at these presentations since Core 2. Plus we already got Haswell running. I even showed it in a thread ^_^

 

[podspi]

Hans de Vries? The guy that jumped the Dulldozer train among other things? Sorry he got zero creditbility left. Cant be bothered with whatever he writes.

He jumped into the JF-AMD stream and lost his ways like a few others.

Hans does not claim to have any insider information. He has always analyzed publicly available information to make predictions. I've always found his posts incredibly insightful.

 

[cytg111]

... Plus we already got Haswell running. I even showed it in a thread ^_^

... "we" ?

 

[ShintaiDK]

... "we" ?

Maybe its gramatically incorrect. English aint my native tongue. Danish is.

But the running Haswell is publicly avaliable.
http://forums.anandtech.com/showthread.php?t=2244291

 

[cytg111]

nothing wrong with "we" .. but given the context there was a possibility that you had inside info .. so just pokin'