K7 is palomnio barton etc. and clock for clock they were much faster then a P4
The idea of CMT + SMT is intriguing, however as we've seen with AMD in the recent past it's the execution part that really matters & they've let most us down in that regard, we'll have to wait & see whether Carrizo &/or Basilisk do a better job with this approach.
Yes but unfortunately the low power/price segment doesn't seem to be taking off for'em either, this may change though with the next round of Windows (pro) tablets but AMD will have to revise their current offerings at least one more time so as to compete with Broadwell on 14nm.Only with Bulldozer based cores. Jaguar and Puma+ have performed as well as AMD promised they would.
Only with Bulldozer based cores. Jaguar and Puma+ have performed as well as AMD promised they would.
As NostaSeronx have said earlier, BD can do 2x ALU(Arithmetic Logical Unit) and 2x AGU(Address Generation Unit) simultaneously, that is 4x ops per cycle. AMD K10 architecture could do either 3x ALU or 3x AGUs thus 3x ops per Cycle.
The problem is that in order to have 4x ops per cycle you need to have the appropriate program, that means you must have data movement so your AGU will need to calculate the address, data operands and registers.
That means that the program should be written for ILP/DLP and SIMD/MIMD(*), but the vast majority of desktop programs are more serial than parallel in nature. AMD knew this but they chose to go for the more ILP/DLP approach because BD's first target was and still is the Server segment. The 2x ALU + 2x AGU approach also helps with the APU Architecture because GPUs are highly parallel in nature. Also HSA greatly uses Data parallelism.
They were also expecting that Desktop programs would become more parallel sooner but that didnt happen.
Also, the Integer execution units doesnt take that much die area as the front end. And it is the front end that they wanted to save space, they duplicated the Int Cores after all.
The only problem with BD was that it was one year late on market. As PileDriver clearly shown that the Architecture was very competitive against 32nm Intel's SandBridge in throughput performance(Server). If the market would not collapse and Dirk Meyer would not left AMD in early 2012 then we could have seen a 22/20nm Steamroller Server part in 2014.
One doesnt excludes the other, you can have a strong ST on a CMT Design. Depending on the program, even BD has higher single thread than K10.
(*)
ILP = Instruction Level parallelism,
DLP = Data Level Parallelism
SIMD = Single Instruction Multiple DATA
MIMD = Multiple Instruction Multiple DATA
They are conflating CMT as a design methodology with the specific microarchitectural trade-offs that AMD chose in implementing their version of CMT.
Conceptually, CMT is not complicated and in the limit of full duplication of hardware resources provides the exact same benefits of adding an entirely new core to the chip.
Its when you choose to cut out too much, hold back on duplicating too many items, that you create a CMT-based product that barely improves on a standalone core design.
AMD's CMT was surprisingly good, providing nearly 80% the performance scaling of having two full-fledged cores. The problem was that those "full fledged cores" themselves were quite weak in terms of IPC...that's a design trade-off made by AMD that had nothing to do with CMT.
As to why other high-profile companies don't pursue CMT themselves, I can tell you the complications that come with robustly qualifying and validating a CMT-based microarchitecture is a strong reason many will avoid it.
Another good reason to void CMT is that it raises your design development expenses over that of designing a smaller (dimension-wise) single-threaded core (or one with SMT enabled) and then just copy-and-paste that core until you have your desired thread-count capability.
Why bring on the complications unless you have to?
http://www.anandtech.com/show/5058/amds-opteron-interlagos-6200
http://www.anandtech.com/show/6508/the-new-opteron-6300-finally-tested
BD was a minor improvement over magny-cours in performance while using more power under load. It was barely competitive vs. westmere and SB completely blew it away. Piledriver was better but the situation was worse against SB.
Lets not forget that the discussion isn't primarily about specific phenom II or BD features but about the situation in general. For a modern architecture phenom 2 is quite bad, lacking power gating and other features to lower energy use. The fact that BD used more power on a die shrink for similar performance is pretty astounding. A heavily modified K10 would still be competitive against kaveri on a performance aspect (no clue about power).
Can you provide an example of BD's higher ST performance on a task not optimized for it (AVX, FMA, or any other extension PII doesn't support).
Where would AMD have fabbed their 20 nm server part in 2014? 20 nm is barely ready and a die that size on an immature process would be prohibitively expensive.
PileDriver 6300 Series is very competitive against 32nm SB server. From the AT Review you can clearly see that the AMD Opteron 6376 is even or faster than Intel XEON E5 2630 but it also cost $783 less (entire server setup hardware)
The AMD Opteron 6380 is way faster than the XEON 2630 and only $331 more expensive (entire server setup hardware). Also, the Opteron 6380 is very close to XEON 2660 that cost $1439 more than the Opteron setup.
Performance and Performance per Dollar, the AMD Opteron 6300 series is very competitive against Intel 32nm SB XEONs.
There are only one or two applications that BD has lower Performance per Watt than K10, in the vast majority BD has same or higher Performance per Watt. PileDrive Performance per Watt is always higher than K10.
From AT review, in Cinebench Opteron 6276(BD) has higher Single Thread performance than Opteron 6174(K10).
GloFo, AMD could have a 22/20nm Server part until the End of 2014 (H2). Yes it would have been expensive but Server SKUs command a high Margin so no problem there.
What do you mean by technical standpoint ??When I say better I mean from a technical standpoint, not price.
A poor product is always going to command a lower price. BD or PD basically cost AMD the server market, their share is almost nonexistent now; their products are not competetitive.
Sorry, I was unclear, I meant at the same clocks. Phemon 11 still does very well when comparing ST. And piledriver better use less power its Much better power gated and on a much better process. There is no turbo on mangy cours.
Sorry, I was unclear, I meant at the same clocks. Phemon 11 still does very well when comparing ST. And piledriver better use less power its Much better power gated and on a much better process. There is no turbo on mangy cours.
When I say better I mean from a technical standpoint, not price. A poor product is always going to command a lower price. BD or PD basically cost AMD the server market, their share is almost nonexistent now; their products are not competetitive.
if a product has better performance/W and performance/$
Meh, IPC isn't that important to me. Choosing to go for lower IPC and higher clocks is just a different type of design- if a product has better performance/W and performance/$, I don't especially care how it got there.
What do you mean by technical standpoint ??
Sorry but Opteron 6376 has the same performance of Intel XEON E5 2630 and cost less. That doesn't make it a poor product. Also, server market share has nothing to do with Bulldozer as a product. AMD was loosing server market share even before Bulldozer was released.
If you mean IPC then i dont have data to provide. But PileDriver's ST performance is higher than K10.
Single-threaded performance is relatively poor when you do not enable Turbo Core: with that setting the Opteron 6276 scores only 0.57. So the single-threaded FP performance is about 10% lower, probably a result of the higher FP/SSE latencies of the Interlagos FPU. However, the 6276 Opteron can boost the clock speed to 3.2GHz. This 39% clock speed boost leads to a 37% (!) performance boost.
Meh, IPC isn't that important to me. Choosing to go for lower IPC and higher clocks is just a different type of design- if a product has better performance/W and performance/$, I don't especially care how it got there.
Cinebench uses the ICC compiler, while the Cinema 4D software uses GCC/MSVC. There is a clear bias that FMACs without ADD offloaders will be slower than fixed ADD and MUL units.The higher CB score is because of turbo, without turbocore CB 11.5 singlethread is around 0.57 (from the first link comparing to the 62xx series). This is BD, Piledriver manages to match performance per clock.
Cinebench uses the ICC compiler, while the Cinema 4D software uses GCC/MSVC. There is a clear bias that FMACs without ADD offloaders will be slower than fixed ADD and MUL units.
Two flaws of the Cinebech;
It does not represent the application it is benching for.
It does not do what benchmarks must be able to do and that is display the performance of highly optimized code for any architecture.
Get a proper optimized benchmark of what Cinema 4D does, and you will observe; Bulldozer(not Piledriver or Steamroller; 8120) being 2x faster than Phenom II X6. While also being 1.1x faster than Westmere(990X). No overclocks or anything and people want the slowest architecture K8 still.
--
https://imgur.com/a/Y8ro0
http://www.yeppp.info/benchmarks.html
With irrelevant bentmarks, nice job, very exceptional, much pride.I'm comparing the two between each other, not towards intel.