That makes every scientist a dreamer.
You deliberately slant in the negative.
I prefer to look at it like a jigsaw puzzle
We have some pieces , we will know approximately what directly adjacent pieces will look like, as we get new pieces (learn more about the core and infrastructure ) our ability to predict becomes better.
What i find funny is people who try to impose a performance or IPC min/max, we dont have enough information which is why i keep asking people to back it up. What we can do is look at the information available ( basically more info then intel has released since ivy) and see if there is limitations, look at the general core philosophy and see how things align.
The one around limited clocks i find most bizarre,compared to BD the pipeline is getting deeper , interconnects/forwarding networks simpler and yet it must run much slower. Now the process will definitely play a part but i'm no where near as pessimistic on that front it has a quite wide core (M1) running @ 2.6ghz in a phone thermal budget. Now obviously that's probably in the optimal operating range for the process but do people really expect it to just hit a brick wall, why?
It's actually quite interesting look at the difference between high per/high power cores(intel,power,z,zen) and lower perf mobile cores, the biggest difference is not in execution resources but the front end. AMD already had a very big front end on bulldozer( the CMT idea of sharing the big expensive bit) they then went and castrated it with low execution resources, a horrible cache implementation/latencies and an equally as bad miss predict penalty ( 20+ cycles and pipeline length is ~15-16 stages).
That's in part why i'm optimistic about Zen, having spent quite a lot of time in learning why bulldozer was bad and then looking at Zen we see only positive single thread performance enabling changes.