When are we going to see chipsets that are capable to offer synchronous 133MHz or higher system (PCI/AGP/FSB) bus?

[Charles]

So far only ServerWorks III chipsets are able to offer 64-bit/66MHz PCI bus. But this is still not good enough! We need something that doesn't have any 'divider' for the system bus! Ideally 133MHz or higher PCI/AGP/FSB is acceptable for future computing. What do you think?

 

[SCSIRAID]

Why do you believe the PCI bus is the system bottleneck? What do you have on PCI that exceeds 264 MB/sec?. AGP is already on its own private bus. Pushing the PCI speeds up to PCI-X 133 Mhz drops the number of slots per CIOB to one (or is it 2?) and adds a LOT of cost to a 5 slot motherboard. Instead of a single chip north bridge you would be looking at a 3 chip soution that will run your cost and real estate thru the ceiling for what I would imagine would be very little gain in the desktop world.

 

[Demon-Xanth]

Charles: and what happens when the bus speed goes above 133MHz? Like the P4 and Athlon busses.

Currently there is a pseudo bus speed war (something long overdue IMO) and tieing an expansion bus to the system bus would make for a short lived item. Currently in spec items would end up out of spec in as little as a year as the system bus speeds increase and the peripheral manufacturers cannot cope with the increase or properly tune thier devices to both the latest and the most populous speeds.

 

[CTho9305]

demon's answer is exactly why the speeds aren't synchronous. If they were, things like 10mbps NICs, which ISA handles fine at 8Mhz, would need to be designed to handle insanely high speeds, raising the cost

 

[Rand]

<< Why do you believe the PCI bus is the system bottleneck? What do you have on PCI that exceeds 264 MB/sec. >>



Imagine a PC with one or perhaps two Gigabit ethernet card in along with a 4-drive RAID 5 array. All of a sudden a shocking amount of bandwidth is being used.

Of course this isnt realistic for the desktop market but their are many servers out there that can saturate even a 66MHz/64bit (528MB/s) PCI bus bandwidth.
I'm not saying 264MB/s isnt quite suitable for even most high-end desktop PC's but if you start considering high-end servers then that changes the requirements drastically.

 

[MadRat]

Its not like these PCI cards contain main system RAM and need that 2gb/sec bandwidth through them.

 

[Diffusion]

<<
I'm not saying 264MB/s isnt quite suitable for even most high-end desktop PC's but if you start considering high-end servers then that changes the requirements drastically. >>


Which is why for high end servers they dont use x86 hardware. Intel in the past has made a concious (sic) decision not to go for the really high end market, and as such, Xeons max out at 8 chips, and P3s max out at 2 chips. If you go to the workstation market, high end servers can range from 4 processors up to over 64 (I am familiar with Sun hardware, SGI hardware goes even higher). Typically, these sytems have seperate &quot;motherboards&quot; that are tied together using a high speed internal bus (as I understand it). This is usually done using Cray's bus technology, which is kind of a standard in that Sun uses it in their E10k system, and SGI uses it under the name of CrayLink or something. As such, each array of disks and RAM and such is tied to a seperate bus, increasing over all thoroughput.

 

[Mday]

<< Charles: and what happens when the bus speed goes above 133MHz? Like the P4 and Athlon busses >>



????????

d0od, the athlon 266 is 2x133, a double pumped 133 MHz FSB.

the p4 400 is a quad pump 100 MHz FSB

 

[Demon-Xanth]

Mday: correct, however the DDR/QDR vs. SDR would NOT be synchronous, you would end up with wasted half cycles.

 

[SCSIRAID]

Rand....

Correct and that is why servers are moving to PCI-X 133 which privides 1GB/s bandwidth to 1 or 2 cards/functions. ( I cant remember whether it is 1 or 2 loads per 133 bus segment).

Beyond that... double pumped PCI-X is being discussed and Infiniband

 

[Charles]

Many years ago, when the first generation desktop computer went commercial, the system speed was 16 MHz (correct me if I'm wrong) and no multiplier was required.

And today, while we are talking about the Gigahertz CPU, the highest internal system bus available now is only 133MHz.

My idea is quite simple: Using only single multiplier for the CPU and nothing else used for the rest of the PCI/AGP bus. Imagine how much bandwidth is available for the system.

 

[Demon-Xanth]

iirc, ISA has a max speed of 12MHz w/ a general spec of 8MHz, there was a divisor in the chipset. There was NOT a divisor in the FSB vs. core until the 486DX2. For a brief moment in time there was not a divisor on PCI. Same with AGP.