Of course. But I only had 2-3 hours last night to run tests and play with BIOS settings. Once I get home tonight I will be back at it.
I would try and get the voltage as low as you can.
Superflower is usually a pretty good quality PSU. I think the problem may have been the Custom cables rather than the unit itself.Also what PSU are you using? I was looking at the EVGA SuperNOVA 850 or 1000 G3 however they are made by SuperFlower which scares me because der8auer was apparently having his temperature issues with a SuperFlower unit, but I am not sure if it was an EVGA or exactly what unit it was.
Single core turbo is 4.3 at stock. All core turbo is 4.0 at stock.
I did not use XMP to get my RAM to 3200. I did not have to change any BCLK settings. I simply changed my clock speed and DRAM voltage to 1.35v.
Don't be scared. At stock or mild OCs, this is a very stable platform for me so far.
Of course. But I only had 2-3 hours last night to run tests and play with BIOS settings. Once I get home tonight I will be back at it.
Superflower is usually a pretty good quality PSU. I think the problem may have been the Custom cables rather than the unit itself.
Nope. it is not okay at all for what is 4Ghz CPU in year 2017.
For reference here is 7700K on 5Ghz and 4.5Ghz uncore and 3000 DDR4 CL13. ( same AIDA version as well ).
1) L1 latency / bw on Skylake-X is OK, same 4 clocks, ~1ns on 4Ghz. One thing they have not touched is still working. ~250GB read 125GB write per core per second.
2) L2 latency huge regression. Intel is blabbering about "2 clocks higher", when in fact in multiple tests I have already seen what is ~18-20 clock latency in Aida etc tests. I don't care if Intel is talking about best case, real world is 50% worse than real world on old design
3) L2 bandwidth is worse, ~30% worse per core when adjusted for 4Ghz clock.
4) L3 is band aid cache, being eviction it borders on hilariuosly useless. 20ns for what is 10GB/s per core when cache is in use by all cores? In year 2017?
Timing for AMD is perfect, Intel has screwed up HEDT and server CPUs in the worst moment possible. The mindshare slide in enterprise will cost them billions in long run, and I can bet a farm, that cloud boys will be the first to jump the ship when they realise that they can bind customer tasks to some CCX limited Numa node and enjoy 250GB/s memory bandwidth without strings attached. The only saving grace for Intel is that they still have a better core.
*Update* Found where I can change the NB clock (Now called CLR in BIOS). Re-ran the test with the NB set to 3200mhz. Big improvement.
Increased L2 is to allow for AVX512 support, first and foremost. L3 is victim and reduced in size because they can't fit bigger L3 without a new node.Broadwell-E and Skylake-X are not comparable to Kabylake/Skylake in latency. Broadwell-E has worse latencies than Kabylake/Skylake too. It has more cores so it naturally leads to higher latencies as L3 cache is split between many cores. In Skylake-X L2 got drastically enlarged and that brings expected increase in latency. L3 is slower as well and only used as victim cache. L3 latency can be fixed somewhat by increasing uncore speed which is too low by default. Probably for TDP reasons. But even with the highest uncore and RAM speed Skylake-X/Broadwell will never match Kabylake/Skylake latencies.
Reviews have shown that Skylake-X has superior multithread cache bandwidth to all other CPUs (including AMD if you're wondering). It's a more throughput oriented CPU.
You criticize L3 being eviction cache without knowing the reasons why Intel made this change. Your glorious Ryzen L3 is eviction cache as well.
Increased L2 is to allow for AVX512 support, first and foremost. L3 is victim and reduced in size because they can't fit bigger L3 without a new node.
End result is that in any real-life scenario that isn't of the pure throughput type, victim L3 will have a negative impact on performance the moment workload becomes sensitive to latency.
What's the point of bringing up Ryzen here? FYI Ryzen L3/core is larger than Skylake-X.
Well launching CPUs with up to 18 cores skimping on L3 isn't the wisest move from Intel.That is correct. I only brought it up as a response to original post which painted Intel as a catastrophy and AMD the solution.
Positive news from Silicon Lottery re: VRM / overclock temps:
The issue isn't as dire as everyone is making it out to be. I wouldn't have mentioned my own issues if I had known der8auer was going to make a video on it.
We have aimed the exhaust of our AIOs at the VRMs, and it has taken care of the throttling for now.
Get the motherboard with the features you like.
When you have time you can find out the maximum stable value (der8auer reported 2800-3200).
Increased L2 is to allow for AVX512 support, first and foremost. L3 is victim and reduced in size because they can't fit bigger L3 without a new node.
No offense, but that wouldn't make me feel any better. Not even a little.
No offense, but that wouldn't make me feel any better. Not even a little.
Edrick has given me a greater level of comfort with the 7820, but the boards make me nervous. A big plus of going with SKL-X for me is to get an 8 or 10 core part now and maybe I can move to 12+ later. I'm not sure these boards can handle it.
Edrick has given me a greater level of comfort with the 7820, but the boards make me nervous. A big plus of going with SKL-X for me is to get an 8 or 10 core part now and maybe I can move to 12+ later. I'm not sure these boards can handle it.
Well launching CPUs with up to 18 cores skimping on L3 isn't the wisest move from Intel.
I'd wait for the second wave of boards to land (e.g. ASUS Rampage VI Extreme)
Die size restriction. These chips are already huge, and the 28 core is already pretty much close to reticle size. There's also power limits -- more cache means more power burn.
More L3 cache would make sense on a 10nm shrink where they will have a lot more die area to work with.
That is a nice improvement. Any chance you could run Intel memory latency checker on it?
https://software.intel.com/en-us/articles/intelr-memory-latency-checker
I am esp interested in "loaded" latencies.
EDIT: it is best to run it from administrative command prompt and non avx512 version i guess?
EDIT2: I would be VERY grateful if You could also run and report the results on the following commands:
mlc --c2c_latency -c0 -w1
mlc --c2c_latency -c0 -w2
mlc --c2c_latency -H -c0 -w1
mlc --c2c_latency -H -c0 -w2
Roman mentioned they are basically doing a recall on those to fix VRM/heatsink situation.Exactly. I was actually going to ask about that - the last time I looked (admittedly, a couple of weeks ago), it seemed the Rampage was MIA. Is Asus holding it back for refinement and possibly a minor redesign?
Well, if you believe that Lenovo rumor the first 10 nm server chip will be Tigerlake, ie: using EMIB. So die size won't be a problem. It is true though that they are paying a very high price for AVX-512.