Why isn't there a backlash against DDR SDRAM like there was with RDRAM?...RE: VIA KT133A

[Soccerman]

Well Said Oneng, I agree with EVERY point u have up there.

lol, you guys are all dissillusioned! you should expect these things, it was idiots on the net that are telling u all this hyped up crap, take it with a grain of salt. maybe you should read the post I made on the last 'DDR isn't what we thought it was' thread.

basically, it's this: Windows takes up bandwidth, as well as the application you are using. therefor, if your FSB is as fast as your RAM is capable of, you will find that your RAM won't be utilized to it's fullest by the CPU, because the CPU bus would be busy with other things as well as Linpack.

pump it up to 200mhz/200mhz FSB/Mem (effective 400mhz), you got a P4 killer in the works. guess why? with 200mhz fsb, the CPU can devote alot more fsb bandwidth to memory, thus you can watch Linpack speeds soar.

don't dis something you don't quite understand. DDR SDRAM has major potential, if used to it's fullest extent. in this case, it would take a faster FSB to show the potential of DDR SDRAM.

HOWEVER, parallelism needs a major overhall. going serial does not mean increased latency.. which is why RDRAM is a bad product. it's increased bandwidth is good, but they should have been able to lower the access times a fair amount..

 

[etech]

I thought this was interesting.

Barrett Calls Rambus Decision 'A Mistake'
10/18/00
Intel Corp. chief executive Craig Barrett now calls his company's relationship with Rambus Inc. "a mistake," according to a report published Wednesday.

 

[Vegito]

Most new mobo has both sdram and ddr ram slots, would you be crazy enough not to buy one with both ?

 

[rmarango]

Reply to Forcesho:

Good point indeed!

 

[FastD]

Just a little thought..

Everyone seems to take this news that the KT133A has 95% of the performance of the AMD 760 coupled with DDR as something bad! I can't really understand this at all!
It simply means that we can have an even higher performing system a lot cheaper and earlier than we thought we would!! And it ironically also means that the Athlon becomes even more of an attractive, CHEAP alternative to the P4 than it ever was!!!
So stop whining about it.. it's great news!!

The Athlon 1200 coupled with cheap pc133 or pc150 cas 2 sdram beats the p4 in the vast majority of benchmarks and will continue to do so for the next few months.

An Ahtlon 1200 is 3000:- here in sweden.. a good kt133A mobo will be around 1500:- and 256mb of high quality pc150 sdram will be around 1300:-.. That sums up to 5800:- that is about $600. The p4 1,5 ghz with same ammount of ram is more than TWICE as expensive! And 99% of us must also buy a new case to have it work properly which makes it even more expensive compared to the Athlon.

Nuff about p4-Athlong comparisons.

I was thinking that it will be VERY interesting to see how high fsb's the Kt133 will be able to handle. The Soltek board that Anandtech reviewed was unable to get any higher than 133 but I've seen other boards go to 150mhz already. We all know that FSB is KING in Quake 3. I think we could see some very interesting results from overclocked Athlons with super high busspeeds. Since it it possible to change the multiplier on the Athlon ppl might be able to reach some VERY high fsb's, all ofcourse provided that the chipset can handle it!

/patrik

 

[rmarango]

I think the best option is to buy a mainboard that supports FSB of 266 Mhz AND both memory types (SDR and DDR) ,mounting on it SDR just waiting for DDR to lower the prices

 

[NOX]

You buy a board that supports DDRAM yet you?re going to use SDRAM, that sounds pretty stupid to me. Why not just use DDR? There is no reason way you shouldn?t. I have yet to see a production board that will support both SDR, and DDR. I?ve heard of it happening but where can you find ?new mobo that offers both ?sdram and ddr ram slots? Gigabyte offers two boards (761), which only use DDR (2 DDR DIMM slots, 184pin).

VIA

OneEng,

Good points, so then I guess you agree it?s a win, win situation for Rambus?

 

[Noriaki]

OneEng You have some good points. But I have a question for you.

You say the only reason that Rambus works out well on the i850 is becuase the P4 is designed to work with high bandwidth/high latency RAM. Well...yes you're right...but you say it like it's a bad thing...why? Intel decided on a memory type they wanted to use and optimized their new architecture for it.
I expect that AMD's next architecture will be more optimized for DDR SDRAM and thus will show more improvement from it than the K7 and P3 did...

I don't understand why you seem to think this is bad?

I pretty well agree with you, I'm just playing Devil's Advocate for kicks and giggles.

 

[NOX]

What I would like to get cleared up, is if RDRAM is so bad and ?inferior?, then why is it that DDR-II is headed on the same path (Serial). I remember someone asking you this before OngEng, and you responded by saying that if that was/is the case then DDR-II is dead, or something to that extent.

I could be wrong about the use of serial, it may be parallel, can't remember a damn thing anymore?

BTW, you do make it sound like it's a bad thing for RDRAM to double DDR in mem intense apps.

 

[Soccerman]

my goodness guys, don't u understand why we don't like DRDRAM? it's because of the crappy latency. Serial busses don't necessarily HAVE to have extremely high latency ala DRDRAM. in fact, the potential for serial busses latency is theoretically good, becuase it's running at higher clock speeds, thus each clock interval is shorter.

sure the P4 is designed with high latency in mind, but that doesn't mean it's a good thing. you have to wonder how good a P4 would do with DDR running with the same potential bandwidth (3.2 gigs/second) would do, seeing as it wouldn't have to wait so long for data from the RAM.

 

[NOX]

The latency issue it not even an issue in the real world. You act like its soooooooooooo noticeable in everyday apps!



<< sure the P4 is designed with high latency in mind, but that doesn't mean it's a good thing >>



That also doesn?t mean it?s a bad thing. What?s funny is some of you blasted RDRAM for it?s high latency (which is not at all noticeable when word processing, browsing the net, typing code etc), now Intel has found some slight solution to this problem and you guys say it?s not a good thing. Now I know why I shouldn?t post in this type of discussions everyone has an opinion and nothing more. The 3.2GB/sec, and 4.2GB/sec is theoretical, and nothing more.

So when AMD does the same to their chipset, you?ll phrase the chipset and CPU, but not DDR right? And what?s to suggest Rambus next entry into the memory market wont be parallel? Will, maybe we shouldn?t answer that, we'd be guessing.

In any case, it?s a win, win situation for Rambus, and they?ll keep making $29million a quarter in royalties, and also for every P4 sold (DELL, Compaq, Gateway, HP, Micron etc). BTW, some of you suggest that Nvidia will now up their prices because they basically have no real competition, what makes you think that if RDRAM died, DDR developers wouldn?t do the same?

 

[etech]

RDRAM, proprietary = bad
DDRAM open standard = good

Litigation is no substitute for innovation.

 

[Sohcan]

<< BTW, some of you suggest that Nvidia will now up their prices because they basically have no real competition, what makes you think that if RDRAM died, DDR developers wouldn?t do the same? >>

Assuming that future standards are implemented by JEDEC, the development would be a cooperation of all the major DRAM manufacturers. I can't remember the name of the term, but it is highly illegal for two or more companies to conspire and artificially raise prices. NVidia can charge whatever the hell they want for their video cards, but if they were to conspire with ATI (thus controlling a vast majority of the video card industry) to raise their prices without cause, they would have a slew of anti-trust lawsuits brought against them.

 

[NOX]

Shocan,

I was not suggesting any one conspire to do anything, if one developer jacked prices or just keep them high, whats to suggest others won?t follow? And nvidia can do what ever they want just like Micron can.

<< Assuming that future standards are implemented by JEDEC, the development would be a cooperation of all the major DRAM manufacturers. >>

So if all the major DRAM manufactures said lets raise prices, that?s illegal?

And even if it was a standard that was implemented buy JEDEC there is nothing to suggest prices wont go up or stay up? As we?ve seen with this whole Rambus fiasco, JEDEC is virtually powerless over any one company.

 

[Charles]

<<Even now, RDRAM is still only showing better performance in synthetic benchmarks...>>

That it is right, but some people build their PCs to achieve those numbers.

 

[Sohcan]

Well, as far as the DRAM industry is concerned, prices are pretty much solely determined by supply and demand since there are so many manufacturers. I don't think any one company can have enough control to force others to follow their pricing scheme.

In reality, the royalties tied to RDRAM are very small compared to the actual market cost of the RIMMs. The prices have been high due to the extremely low production that RDRAM experienced throughout 2000, and the transition from SDRAM to RDRAM production lines. As you can see, RDRAM prices are very reasonable now (though a comparison to cheepo SDRAM isn't valid, since its price is so ridiculously low right now).

The problem with Rambus is that by securing their patents on SDRAM, they can force manufacturers to use RDRAM. And as we have seen with Intel/P4, they can use the licenses to prevent a company from using SDRAM. Regardless of the viability of RDRAM, this prevents the industry from deciding which technology is best. I'm really interested in DDR-II, and I'd hate to see Rambus stiffle the technology just to promote RDRAM.

 

[BenSkywalker]

fkloster-

Your T&amp;L scores don't show much of the benefits of higher system memory bandwith. Your scores, while extremely impressive, are only about 5% higher then what we have seen with standard PC133 SDRAM.

The issue isn't with theoretical peak throughput, it is an issue when you have an actual memory intensive application(such as the Quake3 engine) running in tandem with high levels of geometry. PC133 SDRAM can flood AGP4X if it isn't doing anything else, that isn't where the added bandwith of RDRAM or DDRAM can aid.

If you have Quake3 and the NV15 map bench it, for comparison the fastest Athlon or PIII paired with PC133 SDRAM hits about 30FPS, you may be surprised at just how much faster it is.

 

[Soccerman]

lol.. you guys are all spead freaks here, yet you cannot digest this??

CPU's work now on the order of less then 1 nanosecond. ie, each tick of the clock (when runninag at 1 ghz) is 1 ns long. it is shorter if you talk about 1.2 ghz processors (measured in hundreds of trillionths of seconds, rather then fractions of billionths of a second).

now, you have DRDRAM running at 400mhz. what is it's latency BTW (I honestly don't know) in ns?

then you have DDR SDRAM running at say 100mhz. it's latency is 10 nanoseconds. by far slow compared to the CPU.

then of course, you have Hard drives, which measure access time in Milliseconds (thousandths of a second). if hard drives were running in speeds on par with SDRAM (talking about access times alone, not transfer rates), you can imagine how fast your OS would boot. it's not because your have faster transfer rates, it's because the mass storage device that you have your OS on, is capable of sending more data, because it's turnaround time for random accesses (what alot of OS's have when starting up, notice all those .dll files on your computer? they're used for something) is extremely low respectively to the normal Hard drive.

of course, the mass storage is still not perfect, the transfer rates (in this example) are WAAAYY low compared to what the CPU is capable of chewing on.

do the same with DDR SDRAM (say the request comes in one clock, and the chip responds during the next clock), when running at 100mhz, you have 10ns delay. increase the clock speed to 200mhz, and you have 5 ns. if you serialize something, it has a much thinner pipe to shoot the data through, so the resort is then increasing the clock rate.

if you increase the clock rate to 400mhz, the length of each clock is then 2.5 nanoseconds. if the RAM was capable of turning around a request before the next clock comes, you would have much higher speeds.

this sort of comparison is like SCSI vs IDE. SCSI is superior, simply because it's Access times are much lower (close to 1/2 the typical IDE drive). you can pretty easily see (or feel) a difference between a brand new Quantum AS, and a Quantum 10K 2 SCSI drive. windows is alot snappier feeling, yet we're still talking about access times on the order of milliseconds.. not micro seconds, nanoseconds, or picoseconds.

 

[NOX]

Sohcan,

I totally agree with what you have said. I?m not trying to defend Rambus or anything like that. I?m just trying to understand the reasoning for people downing it when there really is no (clear) evidence that it?s as awful as people suggest. If you look at the whole industry, the market, OEM, individual user there is nothing that RDRAM can?t do, maybe not as well as DDR, but it surely is capable.

I?ll be honest and say I don?t want to see one standard. I think it?s great that we have a choice, though sometimes that?s not always good (i.e. Rambus).

Soccerman,

You?re getting so technical it?s not even fun anymore.

The day I have to wait 1:00+ to access a file because of latency issues, is the day I'll think all of what you have said about nanoseconds, milliseconds etc matters. Beacause since the days of the 486/Pentium, is has not.

 

[Sohcan]

Woah there Soccerman, SDRAM's read latency is much larger than 10ns...the 10ns figure associated with PC100 SDRAM is just the clock period that can drive the modules. L2 caches have typical latencies of around 5-10 ns; SDRAM, like all DRAMs, has a theoretical latency of 50-70ns.

Assuming a system bus of 100mhz, the memory is driven with 10ns clock periods. It usually takes 2 clock periods for the memory address to propogate from the CPU, through the memory controller on the chipset, and to the memory modules. Then, assuming a CAS latency of 2, it takes two more cycles to read the data, and two more cycles for the data to propogate back to the CPU. That's 6 cycles at 10ns, making the theoretical latency 60ns. SDRAM can burst data so that after the initial address read it can continue to send data each clock period, but the initial latency is still 60ns.

I'm not too sure how to calculate the theoretical latency for RDRAM, but it's still in the same ballpark.

I don't mean to single you out, but this is a commonly misunderstood idea...we studied DRAM logic diagrams in my logic circuits class, and the professor made a passing comment about the 60ns latency figure for all DRAM. One student snidely remarked that SDRAM has a latency of 10ns or lower, and the professor promptly put him in his place.

 

[Bilow]

PC2100 is a marketing term. Get real. This is 266MHz memory. Look at ANY memory benchmark comparison between RDRAM on an i850 system and any DDR PC266 (aka, &quot;PC2100&quot, using STREAM, LINPACK, or Sanda Memory benchmark. If you take the marketing at face value, PC2100 should be able to perform within 65% of dual-RDRAM channels (2.1/3.2). It doesn't even come close--maybe 40%.

Go read up on DDR-SDRAM as main system memory. Read even the older Anandtech pieced. There is a little piece of information there you need to commit to memory: The data lines are double-clocked. The address lines are not. DDR's inherent latency, and inherent ability to transmit data is the same as SDR-SDRAM.

The other thing you overlook is how many pins it would take to implement a dual-DDR chipset. DDR already inflicts a 100-pin penalty (on the northbridge) relative to SDR-SDRAM. And you want to double that? Gigabyte/MicronPC had to halt shipments of their AMD760-based systems while the redesigned the motherboard, going from 4-layer PCB to 6-layer. And you want to double the pin penalty?

DDR is simply an attempt to design around patents. It's a pretty bad one--SLDRAM (another Micron initiative) was better, but their lawyers told them that they would lose in court, so SLDRAM is dead. DDR-II will just be the latest attempt to get around the patents, assuming Micron is still in business.

I'll make a side bet--when Sledgehammer ships, it will use RDRAM, not DDR. Because RDRAM delivers.

 

[Soccerman]

oop.. sorry bout that, I know that, I just used it as an example.. I forgot to mention at the end that those numbers aren't the real ones...

 

[NOX]

The pin count for DDR-II will be 232. :Q

 

[Dulanic]

<< You are doing nothing more but showing numbers, which are not evident of current performance. You want me to post a review for you to look at, and then you tell me that DDR is for a fact better? I?m not suggesting RDRAM is better either, but you seem to think that 4.2GB/sec is the actual performance currently experienced by the DDRAM platform, and that is way it's better. That is totally not the case or not relevant as we?ve seen SDRAM perform as well or on par with current DDRAM. In memory intense apps, RDRAM doubles that of DDR, and latency seems to not be an issue. >>



For the 5th time ive said this IM TALKING ABOUT PURELY DDR AND RDRAM... NOT the chipsets or CPUs... this is PURELY about the memory ONLY.

 

[Dulanic]

Actually you know what Ill stop posting in this thread because its obvious you have read nothing I have said. All you have done is take stuff out of context. I specifically said and I quote...



<< We can make a better statement once we see a DDR P4 platform, since the P4 is designed with the higher bandwith in mind. >>



So you can sit here and show me benchmarks... I KNOW in the current implentation of DDR with the Athlon there is only a small performance difference. But that is NOT what I was talking about. I was talking about purely the memory not their CURRENT implementation.