[WSJ] Samsung, Nvidia Shy Away from Server Chip Battle

[AtenRa]

It wouldn't make business sense to continue on shrinking if it didn't. It would be an absolutely pointless graph. When you get wafer pricing from TSMC/Intel/GloFo of course fab costs factor in to the price they charge you.

Transistor price matters only if you keep the same amount of transistors, but that is not the case.

45nm Nehalem 731M transistors
32nm SandyBridge 4C 995M transistors
22nm Haswell 4C GT2 1.4B transistors

16nm Broadwell transistor count will be higher than HSW.

So lower tranistor/price doesnt translate in to cheaper CPUs. It does make the product viable for production otherwise you wouldnt be posible to continiously invest more transistors with every new node.

 

[krumme]

CAPEX only matter if you don't get your targeted volumes. I can see why Globalfoundries might be shy of 10nm and 7nm, but not Intel and TSMC. The rest of the foundries won't even try.

It matters - big time - if you dont get targeted revenue. Every idiot in this world can give Atom away for free. Its an unsustainable mess. As a shareholder you have expectations that match the capability and opportunity of the company.

Intel have a high steady income from a lot of more or less monopoly markets. If Capex was only interesting regarding targeted volume, share price wouldnt be where it is. There is a risk, and giving away Atom for free doesnt change that. It pays nada. Intel have been reducing and adapting Capex for that same reason. Talking Capex without risk-benefit profile is nonsense.

Intels risk profile in Capex is fragile, unlike TSMC ecosystem. It might have more potential but what have been happening for the last year just shows how dangerous it is.

Who can say today about the entry to mobile market that it have the potential to be a solid cash cow - to pay for that huge risk? - the same story also goes for the never ending mubadala Investment in GF.

 

[witeken]

Intel doesn't give Atom away for fee.

 

[Nothingness]

Intel doesn't give Atom away for fee.

Definitely a nice typo or a very good joke :biggrin:

 

[mrmt]

It matters - big time - if you dont get targeted revenue. Every idiot in this world can give Atom away for free. Its an unsustainable mess.

It's not about revenue only, it's about volumes.

And not sure why you are saying that the contra-revenue scheme is unsustainable, nobody ever said that, including Intel. Intel isn't in an open-ended committment to contra-revenue, they have both a deadline and a definite value for it. The contra-revenue scheme is Intel buying market share (and relationships with OEMs, ODMs, design know-how, etc). It's not too different from a shareholder's POV than buying a company paying a premium or the ultrabook marketing fund.

So it *does* yield something for Intel. Whether this is the best investment decision for them, that's another question. But it's not a losses-only game as you are implying.

 

[Homeles]

We've been through this before,

http://forums.anandtech.com/showpost.php?p=36044325&postcount=56

If cost/transistor is coming down faster than ever, and cost/fab is going up faster than ever... they effectively cancel each other out.

 

[simboss]

There is an old list from IHS. While not entirely accurate, it does show the tendency. GloFo for example essentially gave up on 20nm with FF and licensed it from Samsung. And STM is out. I wonder if there will be more than 1 company left for 7 and 5nm.

Although the trend is clear, it does not prove what you imply.
It only means that it makes sense for only a limited number of player to be on the latest node, not that none will ever reach this node later when it makes sense for them.
It would be interesting to find the same graph every few years, then you could draw a conclusion that there are less and less players for each new node, but this graph is not proving it.

 

[witeken]

It would be interesting to find the same graph every few years, then you could draw a conclusion that there are less and less players for each new node, but this graph is not proving it.

Yes, it is. Just look at the height of every node. There were ~20 companies at the 130nm node when it was cutting edge, while there will be only a handful number of bleeding edge companies at the 20nm node.

 

[Exophase]

ImgTec's CEO estimated that only 10-20% of Samsung's apps processors were Exynos, with the rest sourced from external vendors.

Can you give more context on this? In the last several months Samsung has made a lot of new Exynos SoCs, including retrofitting an old Cortex-A9 one with an LTE modem (not sure if this is on-die or simply on-package) This strongly suggests that they're looking to win more of Samsung Mobile's phones and tablets, if they haven't already. Some of that could be filling the void left by ST-E, Broadcom, and TI.

 

[krumme]

It's not about revenue only, it's about volumes.

And not sure why you are saying that the contra-revenue scheme is unsustainable, nobody ever said that, including Intel. Intel isn't in an open-ended committment to contra-revenue, they have both a deadline and a definite value for it. The contra-revenue scheme is Intel buying market share (and relationships with OEMs, ODMs, design know-how, etc). It's not too different from a shareholder's POV than buying a company paying a premium or the ultrabook marketing fund.

So it *does* yield something for Intel. Whether this is the best investment decision for them, that's another question. But it's not a losses-only game as you are implying.

At the end of the day, its about total revenue only. If you run a Hotel you can dump prices on some second class rooms, but if the renting price goes lower than marginal cost, its just not working. Because the perspective is just as valuable as Intel venture into mobile for market share, relations and knowhow. Its replacable next season.

Ofcourse its not a losses only game, but the reason for dumping prices needs a solid reason, and constant evaluation. Its a dangerous road because it also take focus from other business possibilities. And i dont think for a moment the realities in this venture into mobile follow the original business plan.

- Btw it might help on the balance sheet for the hotel manager if he dont put furnitures into some rooms, and then claim better use of capacity. But who beliewe that kind of stuff.

 

[kimmel]

- Btw it might help on the balance sheet for the hotel manager if he dont put furnitures into some rooms, and then claim better use of capacity. But who beliewe that kind of stuff.

As long as the furniture costs multiples of the cost of the room then this analogy might make sense.

 

[simboss]

Yes, it is. Just look at the height of every node. There were ~20 companies at the 130nm node when it was cutting edge, while there will be only a handful number of bleeding edge companies at the 20nm node.

The way I read it, it is a snapshot in 2011, not "when 130nm was leading edge".

What this graph says is that in 2011, there were more companies at 130nm (when it was very far from leading edge) than at 22/20.
3 years later I don't think this list has changed much, meaning that the trailing edge companies have not moved to lower nodes, but the nodes themselves have not changed that much either.
It might take longer for the nodes to make economic sense, or it might never make sense for most of the foundry player, but again, this is not what this graph shows.

 

[mrmt]

At the end of the day, its about total revenue only. If you run a Hotel you can dump prices on some second class rooms, but if the renting price goes lower than marginal cost, its just not working. Because the perspective is just as valuable as Intel venture into mobile for market share, relations and knowhow. Its replacable next season.

No, it's not. You need a certain volume of wafers in your learning curve.

Ofcourse its not a losses only game, but the reason for dumping prices needs a solid reason, and constant evaluation. Its a dangerous road because it also take focus from other business possibilities. And i dont think for a moment the realities in this venture into mobile follow the original business plan.

Intel has a deadline for the end of the contrarevenue scheme and they are reporting the evolution of the program each quarter. I don't think this is too far from "constant evaluation". And sure, that's not their original plan, but who cares? Once they realized their mistake, it's their duty to try to fix it with other tools.

 

[witeken]

The way I read it, it is a snapshot in 2011, not "when 130nm was leading edge".

What this graph says is that in 2011, there were more companies at 130nm (when it was very far from leading edge) than at 22/20.
3 years later I don't think this list has changed much, meaning that the trailing edge companies have not moved to lower nodes, but the nodes themselves have not changed that much either.
It might take longer for the nodes to make economic sense, or it might never make sense for most of the foundry player, but again, this is not what this graph shows.

Hmm, maybe you're right, I didn't think of it that way before. Anyway, here's the source.

 

[AtenRa]

If cost/transistor is coming down faster than ever, and cost/fab is going up faster than ever... they effectively cancel each other out.

This is a nice marketing slide. Have a look at the left box ($/ws). The same 300mm wafer costs almost 5-6 times more at 10nm than 130nm. Now, if you produce a 100mm2 die at 10nm and have the same yields as 130nm process then it will cost you 5-6 times more than a 100mm2 die at 130nm(assuming same 300mm wafer).

Middle box is the Transistor Density(mm2/transistor).

Now have a look at the right box($/transistor), the transistor cost is way lower at 10nm because Transistor DENSITY scales much higher than Fabrication cost. That is because with each node we get almost double the transistor density. But new nodes doesnt double in cost every ~two years.

So at 10nm you have a 100mm2 die that cost 5-6 times more vs 130nm but has more than 80 times the transistor count. That makes the $/transistor to fall more than the rise of the fabrication cost.

So, unless you get a smaller die size or increase your volumes(sales) you dont have lower cost. You can also lengthen your node transitions in order to achieve more volume over time.
You can reduce the die size of the CPUs but not of the GPUs. And here comes the problem for AMD and Intel with the APUs. You can reduce the size of the four CPU Cores, but you have to increase the iGPU size at the same time. So you are loosing what ever advantage you got from the higher density.
Same problem AMD and NVIDIA faces with higher cost in the dGPUs with each new node. They cannot decrease the die size because they will lost performance, they cannot increase volumes so the only thing they can do is increase the product price and lengthen the time from one node to the other.
And this is why Intel trying so hard to get in to the mobile market, because they have high volumes and that will keep them in a position to continue with new nodes. But i believe that even Intel will start to lengthen its node transition as it seams from 22nm onwards.

Edit: This is another reason why Intel wants to go for the 450mm wafers, to reduce the cost of the die.

 

[Homeles]

So, unless you get a smaller die size or increase your volumes(sales) you dont have lower cost. You can also lengthen your node transitions in order to achieve more volume over time.

They are getting smaller, though. Broadwell's already proof of this, at least with the U and Y series. They're about 66% of the size of Haswell-U/Y. Sandy Bridge and Ivy Bridge were about 73% of the size of their predecessors. So the die sizes are a bit more aggressive from a cost standpoint, and we'll probably see this more as time goes on. Perhaps they've also done some additional areal efficiency optimizations.

Ignoring eDRAM, Broadwell-K (4+3) would actually still be smaller, and probably not insignificantly so, than Haswell 4+2. With the eDRAM, it could still end up being below 200mm2 of die. Probably very unlikely, because scaling is never perfect, but it shouldn't be too far above the 200mm2 mark, especially if they've managed to shrink the die size of their second gen eDRAM.

You can reduce the die size of the CPUs but not of the GPUs. And here comes the problem for AMD and Intel with the APUs. You can reduce the size of the four CPU Cores, but you have to increase the iGPU size at the same time. So you are loosing what ever advantage you got from the higher density.

Same problem AMD and NVIDIA faces with higher cost in the dGPUs with each new node. They cannot decrease the die size because they will lost performance, they cannot increase volumes so the only thing they can do is increase the product price and lengthen the time from one node to the other.

I think the IGP war is going to start leveling off, personally. AMD's gone too far, and they need to start focusing on cost. The bandwidth wall isn't helping matters. Perhaps an increased focus on efficiency (a la Maxwell), combined with next year's affordable DDR4 will buy them some time, if they continue their strategy, but they should focus on cost, IMO. Intel's having to keep costs down too, as they enter an increasingly competitive market.

Nvidia and AMD's 20nm GPU dies are probably going to be rather small compared to historic norms. For this reason, it's not a huge deal for Intel to not continue focusing on IGPs as much as they have for their mainstream products. However, given the existence of a GT4e Skylake part, they may make a serious attempt to take further market share from dGPUs in the AIO and notebook market. GT3e Skylake and Broadwell would also both cost a lot less than GT3e Haswell, so they may see some success with that configuration.

And this is why Intel trying so hard to get in to the mobile market, because they have high volumes and that will keep them in a position to continue with new nodes. But i believe that even Intel will start to lengthen its node transition as it seams from 22nm onwards.

Edit: This is another reason why Intel wants to go for the 450mm wafers, to reduce the cost of the die.

I don't see Intel being shy to spend extra money to keep their transition times down; it's one of the greatest advantages they have. They've already already been spending that money, for one. They're spending it on new nodes, and they're spending it on Atom.

As people have observed, Intel's been spending money at an unsustainable rate, relative to the returns they are getting on those investments. Obviously they wouldn't be doing it if they didn't expect to eventually recoup those losses. They need to be aggressive to capture market share in the tablet/phone space, and they also need to be aggressive to keep competitors out of their territory.

 

[krumme]

As long as the furniture costs multiples of the cost of the room then this analogy might make sense.

Sure it makes sense because it doesnt matter how the cost is distributed - and in this hotel its still damn fixed cost with years of -unknown- depreciation. Its still unused capacity. If its expensive chairs bolted to the ground, or bricks you pay for them with $

 

[Homeles]

That's not what bill of materials refers to. The chip itself is just fine in terms of cost. The problem is that it needs a lot more supporting parts than competing ARM SoCs to make a functioning tablet, thereby requiring subsidies to make it work. And the issue here isn't wasted space either. Intel has much much less of an advantage in internal expertise is analog/mixed signal work. It also hasn't been really valuable in a long time so they haven't focused on it. (e.g., there's no point to integrating a $10 device controller when the chip sells for $500.) As average cost per chip comes down, integration matters more.

I'd intended to clarify a bit yesterday, but didn't have the time. Still a bit squeezed, so I'll edit and update later if necessary.

The chip itself is not fine in terms of cost. I am fully aware of Bay Trail's BoM issues, and the meaning of the phrase. Parts of its additional cost are the additional traces and PCB layers, and whatever other nonsense.

That's not the only problem it has. Across the board, it is not a part that was built with cost in mind. It has a comparable die size to Apple's A7 and Qualcomm's Snapdragon 800, while lacking the integrated modem of the latter and despite being on a denser process than either of those parts. There's a fair bit of wasted space, as I pointed out. The Snapdragon 800 and A7 did not slack off in this area, and are packed to the brim.

Had Bay Trail made more efficient use of space, it'd probably be something like $5-10 cheaper, which is pretty significant.

 

[tarlinian]

I'd intended to clarify a bit yesterday, but didn't have the time. Still a bit squeezed, so I'll edit and update later if necessary.

The chip itself is not fine in terms of cost. I am fully aware of Bay Trail's BoM issues, and the meaning of the phrase. Parts of its additional cost are the additional traces and PCB layers, and whatever other nonsense.

That's not the only problem it has. Across the board, it is not a part that was built with cost in mind. It has a comparable die size to Apple's A7 and Qualcomm's Snapdragon 800, while lacking the integrated modem of the latter and despite being on a denser process than either of those parts. There's a fair bit of wasted space, as I pointed out. The Snapdragon 800 and A7 did not slack off in this area, and are packed to the brim.

Had Bay Trail made more efficient use of space, it'd probably be something like $5-10 cheaper, which is pretty significant.

22 nm is not significantly denser than 28 nm (definitely less dense for IP that hasn't been suitably tuned for Intel's design rules). I believe minimum metal pitch is 90 nm (bi directional for TSMC) for 28 nm vs. 80 nm unidirectional for 22 nm. (Apple also runs on a a gate first process which should have less restrictive design rules for poly routing and likely has a similar level of integration as Bay Trail.) Secondly, the Snapdragon 800 is 118 mm2 vs 102 mm2 for a quad core Bay Trail. That's ~15% larger. It does provide a lot more functions, but the analysis of "wasted space" is rather absurd. No one knows what design tradeoffs were made and you don't even know exactly what the patterns correspond to. Maybe the wasted space allows for within die test structures that result in significant yield improvements, or allow the same IP to be easily utilized across product segments.

 

[krumme]

No, it's not. You need a certain volume of wafers in your learning curve.




Intel has a deadline for the end of the contrarevenue scheme and they are reporting the evolution of the program each quarter. I don't think this is too far from "constant evaluation". And sure, that's not their original plan, but who cares? Once they realized their mistake, it's their duty to try to fix it with other tools.

Agree there is several huge economy of scale advantages. But look at the outcome. Another 1080 windows 8 lenovo tablet for cheap.

How can/could they go into expensive 14/22nm atom production with this big and useless soc? How could they forget the crusial development of the DSP part? What about the first iteration of the gfx side?? They missed the basics and it was perfectly within their reach. It was bad decision to go to mobile this late and it was very bad executed when they tried. Now they are using billions to make up for that.

They act like its server market. Same old Otellini recipy -pay your way through- is used each time.

 

[krumme]

In this race for next node, it is easily overlooked one of the advantages Intel holds is the tight design and production integration. The entire integrated tool development. It doesnt matter in 3 years if they have 0 or 2 years advantage on the node itself because there is a cost side to it.

On eg. the critical perf/watt serverside they will easily be able to stay in front because gf and amd is getting relatively more and more separated and they will lose the ability only Intel can master now. It will be interesting to see how they use that advantage.

Anyone knows if that integration advantage is becomming relatively more or less important? And why?