Originally posted by: Pete
Interesting points, both. Steelski, I just didn't think ATI'd push GPU speeds with a half-step like 80nm. I assumed they'd stay within their previous envelope of 590-650MHz, or maybe within the 7600GT's 560MHz. coldpower, I'm not quite sure how you got 234mm^2 for an 80nm R580. If you just did 353*(80^2)/(90^2), I get 279mm^2. I'm also not sure why 12-1-3-1 would be specifically 83% of 16-1-3-1. Mind sharing your formula? Good point about minimum die size for 256b. I can't find one for Parhelia.
Then again, they say they're 128-bit, which goes against The Inq's soft and Xbit's seemingly official announcements. It also seems to me to go against that slide, which shows both cores lining up with the X800 in the Performance segment. I'm thinking that segments are now defined primarily by bus width (64b at the bottom, 128b in the middle, and 256b at the top). That would make it odd (for me) if both are listed as performance but either one or both are 128b. Synthesizing (badly) lots of tidbits, maybe RV570 is 12-1-3-2 and 256b at TSMC and RV560 is 8-1-3-2 and 128b at UMC.
Sorry about that I was using the 110nm to 90nm conversion as a template and got 67% so that how I got my figure down so low.
Your right though, 353mm2 - 90^2mm2 / x mm2 - 80^2mm2 is indeed 279 mm2. Which is the size of the R590 Core, which is still quite large, basically the same yield level as the R520 on 90nm.
I was just assuming because bascially a G73 is half a G71 in terms of pipes and such and has a die size of 65% then the RV560/RV570 would be similar along those lines assuming it were half a R580 for the moment, so things you don't half of course like the AVIVO technology, or in Nvidia's case the PureVideo so hence you don't get a 50% die size.
100 - 65% = 35% / 2 = 17.5% so 83% if the product was 3/4 of a R580, just basically some VERY ROUGH estimates.
Let's look at it another way though, RV530 is 149mm2 and is 1/4 of a R580 bascially.
So 204mm2 of die space for 36 Pixel Processors, 12 TMU, 12 ROP's & 3 Vertex Shaders.
So 68 mm2 of die space for 12 Pixel Processors, 4 TMU, 4 ROP's & 1 Vertex Shader.
Now normalizing for the 80nm process it's 54mm2 of space on that.
So from 279mm2 take way 108 mm2 so 171mm2 die for a 24 Pixel Processor, 8 TMU, 8 ROP's, 6 Vertex Shader Part.
I think a 8-1-3-2 part on 80nm might be too small for a 256Bit WIde Memory Interface, though a 12 Pipe Part can, though that would basically mean the die would definitely be over 200mm2, which can do 256Bit Interface, but not all that profitable for ATI.
Regarding clockspeeds at 80nm, it would really depend if there is low-k dielectric on it or not, if it doesn't have it then expect it to maintain parityo clock rates, if so then there is room for higher clockspeeds.