[Xbitlabs]AMD Excavator Core May Dramatic Performance Increases.

[ikachu]

I left AMD several months back, but when I weighed the pros and cons of staying, seeing what Jim Keller would come up with was definitely high on the 'pro' list. He's got a certain confidence and no-BS attitude (at least from the few times I heard him speak) that makes you believe he could actually pull something off.

 

[Ancalagon44]

I left AMD several months back, but when I weighed the pros and cons of staying, seeing what Jim Keller would come up with was definitely high on the 'pro' list. He's got a certain confidence and no-BS attitude (at least from the few times I heard him speak) that makes you believe he could actually pull something off.

Recently AMD has been performing a lot better, so I am still very interested to see what they can pull off regarding both SteamRoller and Excavator. And Jaguar 2.0.

 

[unon]

Bulldozer was built for scaling up to near 5ghz frequency, which it couldn't on the glofo 32nm process. The cache latency was badly hit too and so was transistor density apparently. With separate decoders and improved cache and trace cache performance would be improved significantly without much penalty. Currently PD does 2.6ghz with 2m @35w vs sandy bridge hypothetical 1.8ghz @35w though it is very different in higher tdp. Intel is roughly 40% above on ipc. Next bulldozer revison(xv) will be made to account for lower frequencies (~4ghz max) and have much higher ipc. Within 10-20% of Intel is possible. Should be interesting how SR performs in mobile.

 

[Exophase]

Currently PD does 2.6ghz with 2m @35w vs sandy bridge hypothetical 1.8ghz @35w though it is very different in higher tdp.

How did you come up with that 35W Sandy Bridge number? There's no quad-core Sandy Bridge rated at 35W. There are 45W models up to 2.5GHz base speeds, but even with linear scaling you to 35W you get higher than 1.8GHz. And the real scaling would be far below linear.

Some would probably argue that a 2M Piledriver vs 4C8T SB isn't a fair comparison to begin with. If it were at least 4C4T the max power consumption would be lower, but TDP classes don't really reflect max power consumption anyway (except that it shouldn't really exceed TDP over long periods of time)

 

[inf64]

Phenom I (65nm) was ~5% slower per clock on average than 65nm Conroe according to plethora of desktop workloads on hardware.fr website.
Phenom II (45nm) was similarly slower (~5-6%) than 45nm Penryn (same source as above)
Piledriver is around 90-95% of ST IPC of 45nm K10 core, sometimes being notably faster and sometimes being notably slower. In modern workloads (read latest software and games) it is usually faster due to better ISA support and better optimizations and support for PD(and BD). On top of this it clocks much higher, both stock and manually OCing.

SR, if it delivers ~10-15% IPC increase, will be faster than K10 core. Then we won't have that big (if at all) module penalty when running two threads (due to 2x more instructions being issued per cycle per module). That penalty is around 15-20% depending on the workload. You can now calculate what it means for multithreaded code Vs PD and VS K10 (six core).

 

[Erenhardt]

All those speculations are fun and what not, but does anyone know then we will see first SR chips (kaveri?)

 

[ShintaiDK]

all those speculations are fun and what not, but does anyone know then we will see first sr chips (kaveri?)

Q1 2014. (Feb I think it is atm.)

 

[inf64]

There were some rumors about paper launch at CES 2014.

 

[Ajay]

SR, if it delivers ~10-15% IPC increase, will be faster than K10 core. Then we won't have that big (if at all) module penalty when running two threads (due to 2x more instructions being issued per cycle per module). That penalty is around 15-20% depending on the workload. You can now calculate what it means for multithreaded code Vs PD and VS K10 (six core).

The problem for SR is delivering a top SKUs running @ 3.5 GHz or greater on 28nm, otherwise net performance will go down. If AMD wants to narrow the performance gap to Intel a bit, they will want to be 200-300 MHz faster than that (plus a turbo of 4+ GHz). I'm just guessing that this is why Kaveri was delayed to 2014.

 

[mrmt]

The problem for SR is delivering a top SKUs running @ 3.5 GHz or greater on 28nm, otherwise net performance will go down. If AMD wants to narrow the performance gap to Intel a bit, they will want to be 200-300 MHz faster than that (plus a turbo of 4+ GHz). I'm just guessing that this is why Kaveri was delayed to 2014.

I doubt that. If the problem was hitting a given clock speed they would have launched mobile SKUs and be done with it. That they didn't release anything until now means either being unable to manufacture anything or an extensive redesign.

 

[inf64]

The problem for SR is delivering a top SKUs running @ 3.5 GHz or greater on 28nm, otherwise net performance will go down. If AMD wants to narrow the performance gap to Intel a bit, they will want to be 200-300 MHz faster than that (plus a turbo of 4+ GHz). I'm just guessing that this is why Kaveri was delayed to 2014.

AMD's Kaveri won't be supporting more than 4 threads initially so it's pointless to chase after every last Mhz. Kaveri will have to outperform Richland by a decent amount(15-20%), it has no chance against 6350 and above.

Last year AMD presented a slide depicting projected performance of Kaveri:

As can be seen above Kaveri 2M/4T with 8CU(GCN) is 1050GFlops APU. x86 cores in Trinity take up ~205Gflops from Trinity's score(819) so Kaveri cannot be slower than that, only faster. 15% faster x86 score is~235. 1050-235=815Gflops for iGPU. We have 512SPs : 815/512/2=0.79 or ~790-800Mhz clocks for on-die GCN iGPU. It fits nicely. KAveri's x86 cores are in the range of similar clockspeed as Trinity in order for this score to be as AMD claims.

 

[Ajay]

I doubt that. If the problem was hitting a given clock speed they would have launched mobile SKUs and be done with it. That they didn't release anything until now means either being unable to manufacture anything or an extensive redesign.

??? No. If they are having a process problem, they may just need time to work the problem. Sometime you know what wrong, it's just a matter of tweaking the process to get the result you want. AMD has done this before. A new stepping (or whatever AMD calls it) would have been an "oops, cya next year sometime"...

 

[Xpage]

Won't it be on the better part of a year with all the delays for this already?

 

[unon]

How did you come up with that 35W Sandy Bridge number? There's no quad-core Sandy Bridge rated at 35W. There are 45W models up to 2.5GHz base speeds, but even with linear scaling you to 35W you get higher than 1.8GHz. And the real scaling would be far below linear.

Some would probably argue that a 2M Piledriver vs 4C8T SB isn't a fair comparison to begin with. If it were at least 4C4T the max power consumption would be lower, but TDP classes don't really reflect max power consumption anyway (except that it shouldn't really exceed TDP over long periods of time)

Ok I mixed up llano and SB. SB igp should take less than trinity though. But comparing to k10 at least PD is a big improvement if it has basic fixes(cache, separate decoder) and the higher tdp sku's clock more linearly. 3M PD vs 4c8t would be an appropriate comparison.

 

[Ajay]

Won't it be on the better part of a year with all the delays for this already?

Close anyway, compared to the earliest roadmap for SR.

 

[Xpage]

I am thinking revision then, so i wonder if the steeping would reflect that. I am hoping the no news is great news, but then again i am not going to be upgrading anytime soon, 2500k has years of life left in it. My laptop could sue some battery life love though

 

[guskline]

It looks like Steamroller is only going to be for APU chips on the Socket FM2+ platform. There will be no FX series AM3+ Steamroller chips for at least the time being. Maybe in one year (Q4 2014) something will show up for AM3+.

I suspected this for some time. My Asus Sabertooth 990-FX will have to be contenet with my FX8350 OC'd to 4.6 Ghz.

To be fair, I've moved over to Intel rigs below in my sig and their MBs rarely span more than 2 cpu versions before they change socket. We got spoiled with AMD. I agree that for AMD's future advancement and considering AMD's model of pursuing APUs, it is HIGHLY unlikely that a SR chip will ever be made for the AM3+ socket.

Such is life!

 

[Insert_Nickname]

I agree that for AMD's future advancement and considering AMD's model of pursuing APUs, it is HIGHLY unlikely that a SR chip will ever be made for the AM3+ socket.

On the other hand, nothing is stopping AMD from releasing a IGP-less 4M/8T SR for FM2+. Wouldn't hold my breath though...