Originally posted by: IvanAndreevich
Nemesis2038
Release date is shady. In short, it seems the number of pretty much all execution units has been doubled. I've heard that after looking @ K9, people called K8 a Willamette. Of course, this will use HT2 which would totally illiminate pretty much any problems that might exist with slow interconnects. In any case, the saying goes 1.0 GHz K9 = 2.0 Ghz K8. Now if that's true, I wanna see what Intel got up it's sleeve.
Don't you worry about Intel. AMD will need their K9. Intel is in some disarray now, so many plans changed, but they are focusing hard on the new 64-bit successor to the Pentium4. The people (marketing!) responsible for the Itanium/Willamette/Prescott/Tejas mess aren't calling the shots anymore. This is going to be a good cpu.
And release dates are looking at early 2006 for both (possibly - yeah right - late 2005 for Intel). AMD will also launch a dualcore K8 AthlonFX/Athlon64 (Toledo) late 2005. Following up on the dual core Opterons (Egypt, Italy, Denmark)
Unless there is a mixup about designations and actual core technologies, I don't think AMD's first dual core cpu is the K9. I also don't think the "K9" will initially need to be launched as dual core.
What improvements are AMD considering for the dual core K8? Palladium, threading and SSE3? Such improved chip could be the "K9". In that case I guess I'm talking about the "K10".
(Work has started on something called "K10" BTW)
Question here: Is the dual core K8 the
K9? I don't think it is.
There are a number of rumoured differences between the K8 and K9:
K9 has frequently been linked with .065 micron process, though said to debut on .090, while dual core K8s are intended to have considerable presence on .090 micron.
K9 is also said to be designed for "multi core" cpus, while the K8 core only supports "dual core" cpus.
K9's pipes are said to contain 15 stages, K8 has 12 stage pipes.
K9's vector and FP superscalarity is said to be increased.
K9 is said to feature 'Hyper Transport 2', and may directly provide links for 16-way systems.
The market name "Opteron2" exists, and I have not yet seen it in use for dual core K8 Opterons.
K9 is a 'speculative result' 'Out of Order execution' superscalar chip, same technology AMD have already explored in the K7 and K8. Improvements seem to follow a pattern similar to K8 from K7.
Slightly deeper pipes for increased clockrate. But that is also again more than fully covered by extensive improvements in sheduling window, speculation and branchprediction. On the contrary, AMD seem to again go for less hiccups and more smoothly flowing program execution. This is logical. AMD continues along a path they should know well, and where they still see large opportunities for improvements.
K9 also increases superscalarity again. But while K8 saw such increase on integer (K7 already having massive FP performance), K9 will do it for FP and vector operations, this time.
It's likely that K9 will also handle threading inside the core. This is not entirely certain, since the thing mentioned has been "chip level multi threading", and obviously, the dual core K8 will feature that as well. But threading in the core could make it possible to shedule more instructions and get better SMT performance from each core. Of course, AMD's sheduling window could be so large that that wouldn't be true. In that case, such technology would be useless in a dual/multicore CPU. If AMD does not intend to release any single core K9, that could very well be the case.
Intel's candidate is dual core by launch, but fundamentally scalable multi core. Intel are 'gambling' (well, - not really) on that software will have evolved even further to take advantage of SMT. Basis is said to be the Centrino. But it is also said Intel will go busting their veins on this one. Lot's of clever technology they have come up with over the years, but ignored in favor of GHz, is going into this one.
Since the last leg of the P4 - Tejas - has ben cancelled, as has the intended P4 successor - Nehalem - there is some likelyhood that we are talking about the true "Pentium 5" here. While the K9 will debut as an expensive Opteron2, it looks like there is some chance the *P5* will debut as a desktop cpu.
Otherwise, my guess is that we are going to see some convergence in CPU technologies from Intel and AMD. Now that Intel are abandoning deep pipelining and AMD have picked up chip threading. That will be good for benchmarking, which currently is like totally architecture dependent. SYSMark03 and PCMark03 are custom tailored around the P4B. SYSMark04 and PCMark04 are custom tailored around P4E/P4C, etc ad nauseum. (Veritest Winstone03 suit seem pretty OK though. Seems more relevant than Winstone04, which contains too many both AMD and Intel new optimizations to correlate well to normal currently useful performance. But it all depends on what you feel a benchmark should show, of course. And I better stop here before this turns into a benchmark thread.)