Also seems like mlid has friends on this forum (or his own accounts) promoting his videos.
I agree. There are an abnormal amount of users defending him. I did not bring it up because I know what it is like to be singled out, but really...
The motherboard vendors probably want a new model name. If they do, I can't see AMD not supporting their partners with one.
The reason is that Zen4 can currently support much higher memory clocks than it could at launch. Memory clock speed is a selling point printed in large type on MB packaging, and most current models only have 6400+, which was what it was possible to test when the motherboards were released. So MB vendors want to refresh their lineups, and when they do that, they usually want to have a new chipset name.
It's entirely possible that the chipset in question is literally PROM21, just rebranded.
They can create new models all they want. Half the X670/X670E boards have been discontinued. There is still some time before a Zen 5 launch.
I don't know whether we'll see new chipsets. To NOT see new chipsets is an unlikely thing. Board partners always want something new. Nevermind the fact they screwed up the last 'new' thing. However, they control the playing field at the end of the day. If AMD dropped Zen 5 tomorrow and nobody responded with updates, AMD would be in trouble.
Rarely isn't the same as never. Especially when a company focuses on agility, many things can be left of the table. Zen4c is a poster child for that. And as an engineer, you know there is such a thing as a free lunch--they just happen to be extremely rare.
But I don't think your categorization is correct.
Anything to do with cache and memory can increase IPC while reducing power consumption. That's a category you can pretty much always do something with.
And anything to do with layout can increase IPC (timings) while reducing power consumption (distances, voltages). That's a category that is never 100% optimal in this day of billions of transistors.
For the former, the most significant example I can think of is Maxwell memory compression: Huge increase to IPC with a massive decrease in power.
For the later, as an extreme example, take an Epyc processor (or even desktop Zen) and make it monolithic (or stacked).
It shows a mix, mostly because Zen3 runs at a higher frequency but has better voltage scaling. Taken as a whole, running clock-for-clock, volt-for-volt, Zen3 probably runs a bit hotter, but that's taking into account the aggregate changes. Unified L3 likely does both increase IPC and reduce power consumption, and there are most likely smaller optimizations that have some positive effect on both, documented or not. If you count changes that less directly improve power consumption by facilitating lower voltage, there are probably others of that kind also.
This is the silicon world, not the software world. Once your designs are released, you can't iterate (for hardware changes) without launching a new product. There are no takebacks. Period. Oh and did I mentioned it costs several million dollars, EXCLUDING development (or marketing, or anything else) costs, to launch new hardware?
The reason so few companies get into the hardware game for ANY platform is that hardware is super capital intensive. If I wanted to launch a new RISC-V chip, I'm looking at close to 9 figures to develop and manufact
If they actually had a new chipset, it could significantly better. The links from the CPU are all PCIE 5.0, a better chipset could provide twice the throughput.
But what Ajay and I are proposing is that the reason is just literally marketing. New x770 motherboards will seem fancier than last-gen x670 ones. Even if it's the same chip. There are reasons why vendors do rebrands.
No, it won't, and AMD isn't changing lane configs. Such a change would require at minimum a new IO die, and more likely a socket change.
Its a only a few AM5 motherboards that can run 8000MT/s stable in 2:1 mode, pretty much only two 1DPC from Asus and Gigabyte atm...
A new generation motherboards could improve improve memory layout/traces for the 2DPC boards.
At the moment they cap out at ~7400-7600MT/s if you want stability every reboot. (kinda behave like tuning memory on raptor lake, stability changes each reboot)
Below i did on my 1DPC GENE
View attachment 86626
Still strutting your stuff eh?
On a more serious note, the number of boards is > 2. However, the number of RAM/CPU combinations is a bit more limited. There are at least 4 boards that I know of, including 1 2DPC board (with only 1DPC installed, of course), that can hit DDR5-8000.
You were wrong.
And for Zen 4 they mention that they use a customised process, we can eventually expect the same for Zen 5 :
That looks like a prerelease slide. It is inaccurate. Zen 3 was 7nm DUV with no process changes. Yes. They did that. It is impressive. 7nm+ is 6nm btw, and the 5xxx series did not use it. Later Zen 3 iterations, however, did.
Intel already has with Arrow Lake.
I suspect one of the reasons Zen 5 kept SMT is because Turin customers wouldn’t be happy with half the threads.
The Arrow Lake thing is just an unsubstantiated rumor at this point, however, SMT is going away EVERYWHERE. When it goes away is another question, The REASON it is going away is security. SMT opens up a ton of side channel attacks.
The process was tweaked or optimized between the initial Zen 2 release and Zen 3, but it was extremely minor. They used the same tweaked process for the "XT" Zen 2 skus and they gained very little from it (~2-3% higher performance at iso power if memory serves). The vast majority of Zen 3's improvement was from architecture and a more optimized layout.
No, it was not, and the XT chips also weren't 'tweaked'. They were binned chips.