- Mar 3, 2017
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Or, they may concentrate on Strix laptop chips at CES and have a separate event for Zen 5 server and desktop announcement.They published Zen 4 expected IPC uplift 6 months before launch, granted they did unveil only 60% of the real number but if Zen 5 is to be lanched in mid 2024 they should give some hints, beside shareholders and other investors want some numbers, so eventually they ll talk about it when they ll release Q4 2023 earnings.
Don't know about others, but for me that would be enough.Or, they may concentrate on Strix laptop chips at CES and have a separate event for Zen 5 server and desktop announcement.
A lot of units are sold, but nowadays they’re almost all cheapo SFF units for 10s of millions desk droids in offices. Intel dominates with equally cheap CPUs. Tiny margins. As the man above said not worth it for AMD to pay to play for almost nothing in return.As I see, finally people are starting to see the light that desktop is a nieche market, and what happens on this market does not define anything.
Mobile is more important market.
Well since AMD is using the same CCX for desktop, laptops servers and HEDT it is all pretty much connected.As I see, finally people are starting to see the light that desktop is a nieche market, and what happens on this market does not define anything.
Mobile is more important market.
If you people watched cpu Jesus tour of amd labs you will know why we won't see consumer dual ccd with 3d cache on both ccds.
Hint cache coherence between ccds...
Anything more specific on this claim? Video, time?
I have skipped over the videos, maybe missing the one specific ones.
Still "cache coherence" argument seems rather weak to me. L3 is victim cache, not quite sure why suddenly coherence network, broadcast and snoop traffic would breakdown from additional 64MB of L3? I think by definition L3 controller is already handling snoops for 32MB, and "content" came from evictions that already "passed" the network in first place.
Makes sense.Being specific , they said when they tested dual CCD vcache in games , it didnt give performance advantage when threads get scheduled across both CCD's for obvious reasons , so they didn't productise it. having a higher core / cost part with 0 performance improvement for its target market isn't ideal.
Ehhhhh not anymore.Well since AMD is using the same CCX for desktop
At the present they do though, but I'm aware that the need for more and denser CCX will be more afterthought in server markets than desktop.Ehhhhh not anymore.
Server gets a 16c CCX in 2024 and it all gets even funnier with Zen6 parts onwards.
unless they manage 6.5 GHz on Intel 4.
Who knows? They might get desperate enough to clock the mobile die to the moon and release it as a limited edition desktop product.Just mobile Meteor Lake, that's all.
We don't even know If It’s capable of 6GHz single core, let alone 6.5GHz.Who knows? They might get desperate enough to clock the mobile die to the moon and release it as a limited edition desktop product.
Ehhhhh not anymore.
Server gets a 16c CCX in 2024 and it all gets even funnier with Zen6 parts onwards.
Frequency SKUs, lol.They still have to do something about the leaky dies.
No lol.That's where desktop comes in.
Frequency SKUs, lol
Just saw new RedGamingTech video titled HUGE Zen5 clocks and benchmarks news, or something like that. Pretty much rehashing the previous video. I am mildly annoyed.
I'm not sure the L3 number is correct, but they have to make a new CCD since Strix Halo packaging is different (no IFOP/GMI).If the clock speed regression is minimal, that would be good.
On the other topics, 16 MB L3 for Zen 5 CCDs for Strix Halo - I am not sure if it makes sense for AMD to make a whole new CCD and strip 16 MB cache off of it. I am skeptical about it.
As far as sharing L3 and Infinity Cahce - I doubt about that one. And it if was really possible, why spend resources to chop off a part of L3, that would get extra utilization from sharing? So, all of that seems a little dubious to me.
I'm not sure the L3 number is correct, but they have to make a new CCD since Strix Halo packaging is different (no IFOP/GMI).
Such as MP2 in mobile parts or specific powersaving tech like stapm? There's a whole lot more differences.has less L3 cache, other changes are possible (though I don't think they were ever discovered).
It's not about leakage (since long ago), but something like this, aside from the process variance: (from old Zen slides but anyway)They still have to do something about the leaky dies. That's where desktop comes in.
Yea.Do they sell enough of those?
No, DG300 is a new TO.and keep the original silicon (including GMI links).
Gaming performance shouldn't see a significant improvement because of IGP, but It should help power consumption a lot.