Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

Page 260 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

Fjodor2001

Diamond Member
Feb 6, 2010
3,917
395
126

And here it is. Leak about Zen 5 IPC increase.
He says IPC increase is 30% and calls it absurdly high, and is instead expecting 15-20%. I'd call 30% low, especially when considering the clock regression.

Add to that the same IOD and thus same iGPU, and no core count increase. And the release date being 2024H2 (meaning release cadence increasing), i.e. as initially expected all the time despite forum local prophet claiming April 2024. I'd call Zen5 DT stagnation from AMD.
 
Last edited:

Glo.

Diamond Member
Apr 25, 2015
5,759
4,666
136
If it isn't obvious, Paul is dancing around the topic of IPC, because the number, as Adroc written many times already is too ridiculous to be believable.

It sounds like genuine too good to be true.
 

Fjodor2001

Diamond Member
Feb 6, 2010
3,917
395
126
Paul is dancing around the topic of IPC, because the number, as Adroc written many times already is too ridiculous to be believable.
30% IPC is too good to be true, despite clock regression?

If it's instead 15-20% with clock regression, we're looking at only a net 10-15% performance increase over ~2 years. That's approaching Intel sandbagging territory, when they were giving us 7% per generation. If Adroc is correct AMD will also bump the price to $999. Who'll be paying that when you can a 7950X3D which is not much slower, for about half the price already now?
 

adroc_thurston

Diamond Member
Jul 2, 2023
3,298
4,721
96
30% IPC is too good to be true, despite clock regression?

If it's instead 15-20% with clock regression, we're looking at only a net 10-15% performance increase over ~2 years. That's approaching Intel sandbagging territory, when they were giving us 7% per generation. If Adroc is correct AMD will also bump the price to $999. Who'll be paying that when you can a 7950X3D which is not much slower, for about half the price already now?
you're shadowboxing wrong things again.
not thinking in the right direction.
 

adroc_thurston

Diamond Member
Jul 2, 2023
3,298
4,721
96
Intel were getting much smaller IPC gains from and with node shrinks were far more impactful though, allowing to cram much more logic with every shrink.
Well they weren't cramming much more stuff, that's the issue.
Compare the size of Sandy 4c and Skylake 4c.

Focus on Apple.
Apple delivered large IPC gains 2013-2019.
Cyclone and Twister were in particular abhorrently mean for their era.
 

Saylick

Diamond Member
Sep 10, 2012
3,372
7,103
136
I think this is the statement from AMD which just being misunderstanded:





Who could've thought that hardware clickbait rumor mill websites would just run with incomplete quotes without fact checking... oh wait.

 

Doug S

Platinum Member
Feb 8, 2020
2,467
4,024
136
Well they weren't cramming much more stuff, that's the issue.
Compare the size of Sandy 4c and Skylake 4c.

Focus on Apple.
Apple delivered large IPC gains 2013-2019.
Cyclone and Twister were in particular abhorrently mean for their era.

Apple started at a far lower level of IPC, so it was easy to make gains back then. But eventually there was only so much wider you could get for "easy" IPC gains, and they were no longer able to make double digit gains every year.

It is also easier to make IPC gains at lower clock rates like Apple's - wider designs have a better ability to result in IPC gains since caches are "closer" (in terms of clock cycles) than they are in higher clocked designs. While Apple isn't clocking as high as Intel/AMD, at 4 GHz these days they are a lot closer to them than they were in 2019 when they were in the mid 2s.
 

adroc_thurston

Diamond Member
Jul 2, 2023
3,298
4,721
96
Apple started at a far lower level of IPC
No?
Swift was the last baby-sized core.
Cyclone was basically a Haswell stuffed into phones and clocked at 800-1.2GHz.
It is also easier to make IPC gains at lower clock rates like Apple's - wider designs have a better ability to result in IPC gains since caches are "closer" (in terms of clock cycles) than they are in higher clocked designs.
everyone does 4 cycle L1's now brother.
Except Intel.
While Apple isn't clocking as high as Intel/AMD, at 4 GHz these days they are a lot closer to them than they were in 2019 when they were in the mid 2s.
They're clocking higher because that's all they can do now.
Arch people jumped the ship en masse.
 
Reactions: Joe NYC

Fjodor2001

Diamond Member
Feb 6, 2010
3,917
395
126
You're thinking how it could be worse.
That's not the way to go.
I'm think it could be what a lot of people and some leaks think it'll be.

And Zen5 DT looks bad. Expensive, poor performance increase, no core count increase, no iGPU improvement, and slowing generational release cadence. Back to Intel-style sandbagging of the past.

Since there's no official info that's the best we've got. So why should we think any other way?
 
Reactions: JustViewing

adroc_thurston

Diamond Member
Jul 2, 2023
3,298
4,721
96
And Zen5 DT looks bad.
ugh.
Expensive
yea.
poor performance increase
No? No.
no core count increase
Don't need that.
no iGPU improvement,
Do you really need a bigger iGP on a desktop/luggable part of all things?
and slowing generational release cadence
We'll see if it's for real.
So why should we think any other way?
AMD people are damn good at what they do, and they have quite a few comp roadmaps to bury.
Neoverse V in particular has to die a horrible death and for that you need gigantic IPC bumps.
 
Reactions: Joe NYC and Tlh97

CouncilorIrissa

Senior member
Jul 28, 2023
292
1,014
96
I'm think it could be what a lot of people and some leaks think it'll be.

And Zen5 DT looks bad. Expensive, poor performance increase, no core count increase, no iGPU improvement, and slowing generational release cadence. Back to Intel-style sandbagging of the past.

Since there's no official info that's the best we've got. So why should we think any other way?
But there is no official info on any clock speed regressions either, yet you decided to run with it to come at the conclusion you wanted. Why is that?

And core count is not going to help you with chugging through bloated SPAs and games, which is what most people are using their CPUs for anyway.
 

Fjodor2001

Diamond Member
Feb 6, 2010
3,917
395
126
=yes
=bad
=yes (or you think 10-15% over 2+ years is good?)
Don't need that.
=you don't need that, others do
Do you really need a bigger iGP on a desktop/luggable part of all things?
=yes (AMD is lagging behind Intel iGPU now, despite AMD claiming to be an (i)GPU company)
We'll see if it's for real.
=You got any official evidence of the opposite? You made dead certain claims about April 2024 release, all the way up until ~3 months before release. What do your 100% certain sources tell you now w.r.t. release date?
AMD people are damn good at what they do, and they have quite a few comp roadmaps to bury.
Neoverse V in particular has to die a horrible death and for that you need gigantic IPC bumps.
=Ok, so for Zen5 DT we should be seeing ~30% performance increase (via IPC and/or clocks), 32 cores, new IOD with better iGPU, lower price, etc? Any official info to back that up?
 
Reactions: JustViewing

RnR_au

Golden Member
Jun 6, 2021
1,802
4,405
106
But there is no official info on any clock speed regressions either, yet you decided to run with it to come at the conclusion you wanted. Why is that?
I think @Fjodor2001 missed Kepler's recent excellent summary as to why we should error on the positive side of IPC gains....

It's not that complicated. Zen was designed to be a very balanced uarch, as it replaced both the "HPC" Bulldozer line of cores and "Low power" Cat cores. So they were very careful with any power and area increases, as going ham (like Intel) could hurt markets like Cloud and low-end Notebooks.

With Zen5 they now have the Dense/Compact cores that can serve markets that need max core density, low cost and low power cores. So the Zen5 design team was allowed to make a more performance focused core. As a result, the performance increase is bigger than usual.

IOW, Zen1 to Zen4 were "Medium" cores. Zen5 is AMD's first "Big" core in well over a decade.
 
sale-70-410-exam    | Exam-200-125-pdf    | we-sale-70-410-exam    | hot-sale-70-410-exam    | Latest-exam-700-603-Dumps    | Dumps-98-363-exams-date    | Certs-200-125-date    | Dumps-300-075-exams-date    | hot-sale-book-C8010-726-book    | Hot-Sale-200-310-Exam    | Exam-Description-200-310-dumps?    | hot-sale-book-200-125-book    | Latest-Updated-300-209-Exam    | Dumps-210-260-exams-date    | Download-200-125-Exam-PDF    | Exam-Description-300-101-dumps    | Certs-300-101-date    | Hot-Sale-300-075-Exam    | Latest-exam-200-125-Dumps    | Exam-Description-200-125-dumps    | Latest-Updated-300-075-Exam    | hot-sale-book-210-260-book    | Dumps-200-901-exams-date    | Certs-200-901-date    | Latest-exam-1Z0-062-Dumps    | Hot-Sale-1Z0-062-Exam    | Certs-CSSLP-date    | 100%-Pass-70-383-Exams    | Latest-JN0-360-real-exam-questions    | 100%-Pass-4A0-100-Real-Exam-Questions    | Dumps-300-135-exams-date    | Passed-200-105-Tech-Exams    | Latest-Updated-200-310-Exam    | Download-300-070-Exam-PDF    | Hot-Sale-JN0-360-Exam    | 100%-Pass-JN0-360-Exams    | 100%-Pass-JN0-360-Real-Exam-Questions    | Dumps-JN0-360-exams-date    | Exam-Description-1Z0-876-dumps    | Latest-exam-1Z0-876-Dumps    | Dumps-HPE0-Y53-exams-date    | 2017-Latest-HPE0-Y53-Exam    | 100%-Pass-HPE0-Y53-Real-Exam-Questions    | Pass-4A0-100-Exam    | Latest-4A0-100-Questions    | Dumps-98-365-exams-date    | 2017-Latest-98-365-Exam    | 100%-Pass-VCS-254-Exams    | 2017-Latest-VCS-273-Exam    | Dumps-200-355-exams-date    | 2017-Latest-300-320-Exam    | Pass-300-101-Exam    | 100%-Pass-300-115-Exams    |
http://www.portvapes.co.uk/    | http://www.portvapes.co.uk/    |