Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[Fjodor2001]

I think @Fjodor2001 missed Kepler's recent excellent summary as to why we should error on the positive side of IPC gains....

So what does that mean in concrete numbers? How many percent IPC gain for Zen5 vs Zen4, and what percent clock regression?

 

[RnR_au]

So what does that mean in concrete numbers? How many percent IPC gain for Zen5 vs Zen4, and what percent clock regression?

No idea for concrete numbers. I don't have access. But you seem to be fixated on roughly Zen 3 gains for some reason. I think for the twin reasons of a wider core and a fuller fat arch allowances vs the balanced arch of yesteryear, that Zen 5 IPC gains will exceed Zen 3 IPC gains. And exceed it well.

 

[Glo.]

For one thing, 8 wide decode is 33% wider compared to Zen 4 which had 6 wide decode, and if Zen 5 has 6 wide dispatch - we are looking at 50% increase over Zen 4 giving stupidly high throughput, olong the lines of Apple cores width.

If everything around the core is being reworked to be able to feed this throughput - even 40% IPC increase is NOT out of this world. It should be expected IF it is 8 wide dispatch(it is according to leaked slides) and 6 wide decode(we will see).

 

[Gideon]

I think @Fjodor2001 missed Kepler's recent excellent summary as to why we should error on the positive side of IPC gains....

One thing Kepler_L2 didn't really touch upon is that ... is Zen 5c somehow more "pruned" than Zen 4c (e.g. less floating point resources)? If not, I don't really see anything that's changed compared to Zen 4 (and why they couldn't have "gone crazy" already then).

Or in other words, if it's big then the 5c chip will also be bigger (unless it's a more serious cut this time)

I personally wouldn't mind a slight cut to the FPU at all actually (for the "c" cores). Most of the target-market (hyperscalers) really wouldn't care.

No idea for concrete numbers. I don't have access. But you seem to be fixated on roughly Zen 3 gains for some reason. I think for the twin reasons of a wider core and a fuller fat arch allowances vs the balanced arch of yesteryear, that Zen 5 IPC gains will exceed Zen 3 IPC gains. And exceed it well.

And regarding bigger === more transistors doesn't always mean better. I remember Raja claiming most of Vega's transistor-budget went for it to clock higher than Polaris .... and it failed miserably at that (while Nvidia managed to do a lot more with less in Pascal).


Nice architecture graphs, transistor counts / die sizes don't really mean squat, until someone leaks actual (relevant) benchmarks.

 

[Fjodor2001]

Zen 5 IPC gains will exceed Zen 3 IPC gains. And exceed it well.

But there is no official info confirming this. Also Zen3 has a clock improvement vs Zen2, where as Zen5 will have a clock regression vs Zen4. So IPC improvement for Zen5 will have to be even higher than for Zen3 to compensate.

And regardless, all is not well since we're not getting any core count increase like we got with early Zen generations. From 4C->8C, and then 8C->16C.

 

[RnR_au]

One thing Kepler_L2 didn't really touch upon is that ... is Zen 5c somehow more "pruned" than Zen 4c (e.g. less floating point resources)? If not, I don't really see anything that's changed compared to Zen 4 (and why they couldn't have "gone crazy" already then).

Or in other words, if it's big then the 5c chip will also be bigger (unless it's a more serious cut this time)

I personally wouldn't mind a slight cut to the FPU at all actually (for the "c" cores). Most of the target-market (hyperscalers) really wouldn't care.

I think AMD will diverge the two archs slowly as time goes on while still keeping the same ISA. Makes sense to lean into the different use cases for the two archs.

 

[Saylick]

All this back and forth on what Zen 5 could and couldn't be is exactly the reason why I was bummed when we heard that an April launch was possibly canned. Would have been nice to just see AMD lay the cards down so that we wouldn't have to guess anymore.

 

[AMDK11]

For one thing, 8 wide decode is 33% wider compared to Zen 4 which had 6 wide decode, and if Zen 5 has 6 wide dispatch - we are looking at 50% increase over Zen 4 giving stupidly high throughput, olong the lines of Apple cores width.

If everything around the core is being reworked to be able to feed this throughput - even 40% IPC increase is NOT out of this world. It should be expected IF it is 8 wide dispatch(it is according to leaked slides) and 6 wide decode(we will see).

Where did you get the idea that Zen4 has a 6-way decoder?

From Zen1 to Zen4 the decoder is 4-way!

There is no leak suggesting that Zen5 will even have a 6-way x86 decoder.

Intel from Conroe to SunnyCove has a 4-way decoder. Only GoldenCove introduced a 6-way decoder.

 

[RnR_au]

And regardless, all is not well since we're not getting any core count increase like we got with early Zen generations. From 4C->8C, and then 8C->16C.

I'm curious... what is your usecase for more than 8 high performance cores in the mainstream desktop world? Why should AMD spend double the silicon on cpu's? Even a lowly 7600 does admirably well in gaming these days, so I can't see why AMD should be shipping 16 cores as their 'standard'.

 

[Thunder 57]

But there is no official info confirming this.

And regardless, all is not well since we're not getting any core count increase like we got with early Zen generations. From 4C->8C, and then 8C->16C.

There is also no offical info regarding clock regression, but you are stating it as fact. Also, Zen started at 8C and then went to 16C. I very much doubt there is much use for 32C nor do I think people would pay the price. Not for awhile anyway. For those that would pay, there is Threadripper.

 

[adroc_thurston]

(AMD is lagging behind Intel iGPU now, despite AMD claiming to be an (i)GPU company)

This is the most arbitrary thing ever.

 

[moinmoin]

is Zen 5c somehow more "pruned" than Zen 4c (e.g. less floating point resources)?

This appears to be the plan. I've seen several allusions to Zen 5c being more than a simple area optimized version of the normal core as Zen 4c is. Unfortunately I can't find the sources anymore right now.

 

[gdansk]

All this back and forth on what Zen 5 could and couldn't be is exactly the reason why I was bummed when we heard that an April launch was possibly canned. Would have been nice to just see AMD lay the cards down so that we wouldn't have to guess anymore.

Very optimistic of you to assume any AMD announcement will include maximum core counts.
Consider that it's generally accepted as possible for one Zen4 CCd & one Zen4C CCd to be attached to the same old Raphael IOd. But none such product was made nor announced. But if/when AMD felt it necessary it would likely have appeared.

 

[Fjodor2001]

Zen started at 8C and then went to 16C

Yes, and previous generation it was compared to was Intel 4C. So Zen1 effectively started with a 4C->8C increase.

 

[gdansk]

Yes, and previous generation it was compared to was Intel 4C. So Zen1 effectively started with a 4C->8C increase.

And by the virtue of comparison AMD is effectively Intel 24C right now. So Zen 4 effectively started with a 16C->24C increase.

 

[Fjodor2001]

I'm curious... what is your usecase for more than 8 high performance cores in the mainstream desktop world? Why should AMD spend double the silicon on cpu's?

Same argument Intel used for sticking to 4C 4eva on DT, when there was no competition. But it got debunked.

And if you think ”nobody will ever need more than 8C on DT”, then why does AMD already have 16C CPUs on DT since a few generations back? And why did Intel bump that further to 24C on DT, and why will they bump it to 8+32 in upcoming generations?

 

[CouncilorIrissa]

This thread is following in the "8/12GB VRAM is not enough" footsteps, I see. Going in circles and repeating the same arguments over and over again.

 

[gdansk]

This thread is following in the "8/12GB VRAM is not enough" footsteps, I see. Going in circles and repeating the same arguments over and over again.

It's worse than that because at least there you can know the general performance those parts are supposed to have and try different settings.
Here, despite not knowing any of the performance characteristics or die size or considering IOd reuse, one argues for moar cores ad infinitum on the basis of Intel theoretically adding more cores (which is also not known) and one's own performance projections.

 

[blackangus]

I'm curious... what is your usecase for more than 8 high performance cores in the mainstream desktop world? Why should AMD spend double the silicon on cpu's? Even a lowly 7600 does admirably well in gaming these days, so I can't see why AMD should be shipping 16 cores as their 'standard'.

Your not the 1st to ask, but I haven't seem a response about this at all.
Id love to know the use case where he wants more than 16 cores at the cost of them being slower (like Intel) rather than faster 16 core chips.
There are a few workloads that would benefit there, but I know for all my work I would rather have fast 16 core than more slower cores, especially with two different ISA's like Intel.
Bought alot of Intel chips over time an more than a few AMD, but this dual ISA nonsense isnt what I want and isnt beneficial to the work I do, not to mention gaming.

 

[CouncilorIrissa]

Your not the 1st to ask, but I haven't seem a response about this at all.
Id love to know the use case where he wants more than 16 cores at the cost of them being slower (like Intel) rather than faster 16 core chips.
There are a few workloads that would benefit there, but I know for all my work I would rather have fast 16 core than more slower cores, especially with two different ISA's like Intel.
Bought alot of Intel chips over time an more than a few AMD, but this dual ISA nonsense isnt what I want and isnt beneficial to the work I do, not to mention gaming.

16+ mem-bandwidth starved* cores, I'd add.
Because if one is to suggest that AMD also add quad-channel to the mainstream platform, then the question to be asked is why should mainstream market pay exorbitant motherboard prices.

The same mainstream market that has spent the last year and a half screaming bloody murder over Zen 4 platform pricing.

 

[RnR_au]

And if you think ”nobody will ever need more than 8C on DT”,

I don't. I never said this - you are putting words in my mouth. I asked for your usecase today for 16 high perfornance cores to be mainstream cores.

then why does AMD already have 16C CPUs on DT since a few generations back?

Its not mainstream... its niche.

And why did Intel bump that further to 24C on DT, and why will they bump it to 8+32 in upcoming generations?

Because they have nothing else.

Anyways I'm out on this convo with you. You seem to be arguing for the sake of arguing

 

[CakeMonster]

I used to worry about cores, seeing lots of benchmarks where the 3950X would use more than 50% in several real world cases including multitasking. I naively thought that signaled a problem with 16 cores in not too long. Z3 and Z4 proved that wrong though, the lower core parts held up really, really well, both in gaming an multitasking. I myself have moved from 8 to 12 to 16 since 2018, but I don't worry at all about being stuck on 16c for ~3 more years or so. You will see people worrying more about it since they also naturally move upwards over time and they notice the ceiling staying at 16 cores, but the vast majority of them still will have no issue with 16 powerful cores.

 

[adroc_thurston]

This appears to be the plan

Nah.
Same RTL as classic.

 

[gdansk]

Hypothetically would you rather have:
15% more 1T performance combined with 80% more MT performance (let's say it is 32 cores)
or
30% more 1T performance combined with 20% more MT performance (let's say it can't clock well in MT)
?

These are not random numbers but are also not a prediction of Zen 5 performance. Instead, these numbers are chosen because they are equal "expected improvement" if 80% of your work is 1T limited and 20% is perfectly parallel. Just trying to figure out preferences of what we would like Zen 5 to look like.

 

[itsmydamnation]

For one thing, 8 wide decode is 33% wider compared to Zen 4 which had 6 wide decode, and if Zen 5 has 6 wide dispatch - we are looking at 50% increase over Zen 4 giving stupidly high throughput, olong the lines of Apple cores width.

If everything around the core is being reworked to be able to feed this throughput - even 40% IPC increase is NOT out of this world. It should be expected IF it is 8 wide dispatch(it is according to leaked slides) and 6 wide decode(we will see).

All zens so far are 4 wide decode, just like bulldozer before it