Oooh nice!Genoa just rocks . I will know by personal experience in a few days when my 9654 comes.
60 days? idk Joe.I think by sometime in June, socket AM5 will overtake both Intel and AM4.
On EPYC side, whole true, that AMD sells ever one they make, otherwise, they would be building huge inventories, but the more important metric now (as opposed to previous 2 years) is that AMD could make far more that it is selling. But AMD is throttling the orders from TSMC to only what can be sold.
AMD has two teams. One team creates a new architecture and then refines it. The other team does the same.~3 years ago I thought the successor to Zen5 would be a complete new architecture family. Since then they suddenly dropped the Zen6 name. I figured immediately it would be rather be an intermittent step like Zen3+/Z4 refreshes is to Zen3. RedGamingTech has confirmed this with the recent leak. So for Zen6 I wouldn't expect too much other than tweaks and improvements. IPC increase won't be much; likely only 5% over Zen5. Most actual gains is probably due to clockspeed increases. At most 10-15% compared to Zen4 on N3 so only 5+ % over Zen5. This will give Intel an opportunity to catch up with Arrow Lake on Intel20A. AMD would have to move to N2 in the later Zen6+ refresh stage.
do you mean socket sp3 or sp5?The availability of PS5 at least shows that indeed some limit has been lifted in Q4. Not sure if we can already conclude for all markets that demand is the limit now though.
I wonder if we can get any info how big the server market backlog still is, if any. That's something I didn't follow.
60 days? idk Joe.
Yes most people confuse this when they read it. AMD is throttling orders based on what they know will sell out. It's a very good lineup but you can 100% over produce epycs and be stuck with inventory. dc refresh cycles come in waves, it's not constant.
thw two issues i see with this is not the cost of the a620 platform but it's features set and whether it can handle more than a 7600x or 7800x3d. Some people stick flagships secondaries on a cheap mobo and don't need much other than basic fast storage. This imo should be criminal because you'd never stick a 13900k on a cheap sub $100 z690 mobo with questionable design. ddr5 has ramped up and costs are falling every few weeks. The new non binary ram kits coming out are already increasing in speeds compared to when they were first announced months ago. but you forget there will still be lots of people who'll whine about a $20-30 ddr4 vs ddr5 price difference. or that ddr5 is still not as fast as fast ddr4 when they don't own fast ddr4, never will and wouldn't know how to adjust their mobo to take control of those 4000+ speeds. availability of the cheaper a620 also matters. using mf as a basis is ok but their sales are limited to germany. they can give only a small idea of what the market is like in mainland europe.I think 2 variables will move the market quite rapidly:
- cheap(er) motherboards, including 620 based motherboards
- 7800x3d (assuming it will be readily available).
Using data from MindFactory used by TechEpiphany, AM5 is on the verge of overtaking Intel Alder / Raptor. A good chunk of 5800x3d sales will shift to 7800x3d, and then, by overall AM5 solution being quite cost / performance competitive, most people's new builds will shift to AM5.
Also, the cost difference between DDR4 and DDR5 is shrinking. DDR5 prices are falling faster than DDR4 prices.
Without paying money to some consultant or other, no. And it's not clear if they have accurate and up-to-date data either. Knowing that gives someone, somewhere a competitive advantage. AMD and their customers aren't going to tell you.I wonder if we can get any info how big the server market backlog still is, if any. That's something I didn't follow.
Rome and Milan on SP3 are the ones AMD previously publicly admitted having backlogs for. I think for Genoa on SP5 AMD publicly stated that availability wouldn't be a problem at launch, though the question is whether that's due to a higher production throughput or only due to being able to build an inventory before launch thanks to the delays. And in the end true availability always depends on actual demand being not only met but exceeded, which can't happend if demand was predicted too low.do you mean socket sp3 or sp5?
As little it is nowadays the quarterly financial report calls are usually a good source for at least getting the gist of developments. Should probably look through the last couple ones, maybe we missed some hints.Without paying money to some consultant or other, no. And it's not clear if they have accurate and up-to-date data either. Knowing that gives someone, somewhere a competitive advantage. AMD and their customers aren't going to tell you.
Was it this one?
It's a good explainer, and also something I have been posting about for last 6 months, as being the future of AMD architecture, going down to desktop, even notebooks eventually.
It seems that AMD was not confident enough to adopt this architecture in Zen 5, but it is likely coming in Zen 6 (or maybe Zen 5+). MLID mentioned that Zen 6 is moving to multiple IO dies, which seems like MI300
I am optimistic it will happen.Yes, thats the one. Good video. I hope AMD adopts it while still on AM5, so i dont have to change board, if i want new such CPU
My Genoa is being shipped today (9654) and there are a lot on ebay, some at decent prices (like mine)Rome and Milan on SP3 are the ones AMD previously publicly admitted having backlogs for. I think for Genoa on SP5 AMD publicly stated that availability wouldn't be a problem at launch, though the question is whether that's due to a higher production throughput or only due to being able to build an inventory before launch thanks to the delays. And in the end true availability always depends on actual demand being not only met but exceeded, which can't happend if demand was predicted too low.
As little it is nowadays the quarterly financial report calls are usually a good source for at least getting the gist of developments. Should probably look through the last couple ones, maybe we missed some hints.
I am optimistic it will happen.
I believe AMD will need a special Zen 4 CCD for Mi300, and then perhaps Zen 5 for Mi400. AMD likes to re-use and the best way to reuse would be to make a client specific base die.
Which would cost money, but also open some new options. For example, if the base die was similar size to Mi300, then 3 Zen 4 CCDs could stack on top, enabling 24 cores.
Zen 4 CCD has CXL related changes like SMBA and BMEC. CXL memory coherency also requires a change in the L3 CCM/Cache Coherent Master block.CXL does not affect the Zen 4 CCD, only the server IOD.
Using SoIC for just 200 GB/s of traffic is going to need very few TSVs but would necessitate the FE stacking (and adding the complexity, cost) in a situation where it is not needed.I am optimistic it will happen.
I believe AMD will need a special Zen 4 CCD for Mi300, and then perhaps Zen 5 for Mi400. AMD likes to re-use and the best way to reuse would be to make a client specific base die.
Which would cost money, but also open some new options. For example, if the base die was similar size to Mi300, then 3 Zen 4 CCDs could stack on top, enabling 24 cores.
I saw prices as low as $3,200 for the 9654. Insanity for a 96 core part.My Genoa is being shipped today (9654) and there are a lot on ebay, some at decent prices (like mine)
Just for science: How long did it take to ship, or was it already in stock?My Genoa is being shipped today (9654)
ebay. In stock.Just for science: How long did it take to ship, or was it already in stock?
Geez, those coils are HUGE! Thanks for the graphic.If you are wondering why GMI are taking up so much space, it is because they contain T Coils which look like this below and few other passive elements.
Zen 4c is the same core, but the layout is optimized for density and power consumption, not peak performance. Also, it will be on N4.
Same with Zen 5c. It will likely be on N3, but probably not on the performance optimized N3.
It seems that AMD was not confident enough to adopt this architecture in Zen 5, but it is likely coming in Zen 6 (or maybe Zen 5+). MLID mentioned that Zen 6 is moving to multiple IO dies, which seems like MI300
AMD has two teams. One team creates a new architecture and then refines it. The other team does the same.
Team 1: Zen 1 -> Zen 1+ -> Zen 2
Team 2: Zen 3 -> Zen 3+(mobile) -> Zen 4
Team 1: Zen 5 -> Zen 6
I'm unsure where you are getting the 5% number for the IPC increase from 5 to 6. AMD targets 8-10% IPC increases for refreshes and has beat their targets every single time. Zen 1 to Zen 2 was about 18% (15% over Zen 1+) and Zen 3 to Zen 4 was 13%.
BREAKING: RISC-V Conference held by Tenstorrent accidentally leak Zen5 performance, also include NVIDIA Grace which is still being projected
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This is just a hypothesis/projection
This 'projected' Zen 5 shows a ~25% IPC gain, and a bump in frequency. HmmBREAKING: RISC-V Conference held by Tenstorrent accidentally leak Zen5 performance, also include NVIDIA Grace which is still being projected
View attachment 79037