You still believe Turin is +50% SIR2017? If that was the case why wouldn’t AMD share any numbers for Specint or perf/watt when announcing Zen 5?Na?
Yea, anotha roadkill.
Still is.
Cuz not the AI message.If that was the case why wouldn’t AMD share any numbers for Specint or perf/watt when announcing Zen 5?
I don't believe stuff.You still believe Turin is +50% SIR2017?
I'll make sure to dig this post up whenever Turin properly launches. I'll happily eat crow if it achieves that mythical +50% SIR2017.Cuz not the AI message.
Even Turin preview was goddamed AI CPU inference.
Also you can kind gauge perf/W out of cinememe numbers for STX or GNR. Not that hard, even if cinememe 1t isn't a good case for Zen5.
I don't believe stuff.
Getting reports on this post. This isn't a versus thread. If all you can do is antagonize AMD users in an AMD thread, you need to get out. Or I can help you. Your choice.Well, we’ve seen the SRF v Bergamo benchmarks. If you were to compare it against a Xeon powered by Darkmont I doubt it’d even be close.
It's also a uni-CCX per CCD and in general is neat™.Turin has 50% more cores and 16% more IPC than Bergamo. So 1.74x more throughput in theory than Bergamo.
It's a very very brutal thing indeed.If N3E offers more than 20% ppw than N5 then I think it'll be fine
This is old stuff.AMD BIRMANPLUS - Geekbench
Benchmark results for an AMD BIRMANPLUS with an AMD Eng Sample: 100-000000994-14_N processor.browser.geekbench.com
Strix?
I'm gonna do a little experiment - I will take this:
And do a weighted geometric mean score of all these "subtests" by separating them into int, fp and crypto and assign the weights as Geekbench 5 does. That would be 65% int, 30% fp and 5% crypto.
For that I will at the onset have to exclude the gaming scores, as games are neither purely int not purely fp. Also, I don't really know if Adobe Premiere Live Playback test uses the video engine or not, so that is excluded as well.
Integer:
Handbrake (assuming it is x264)
Kraken
WebXPRT 4
Speedometer
Octane
Geekbench 6 Text Processing
Floating point:
3DMark Physics
Cinebench R23
Blender
Crypto:
AES-XTS
Result =
(1.11^0.65 * 1.12^0.65 * 1.12^0.65 * 1.15^0.65 * 1.16^0.65 *1.19^0.65) * (1.13^0.3 * 1.17^0.3 * 1.23^0.3) * 1.35^0.05 = 1.967
1.967^ (1/(0.65*6 + 0.30*3 + 0.05)) = 1.149
That is, with a more ideal selection of benchmarks, and using the weights that Geekbench does, we get
Zen 5 IPC = 1.149 * (Zen 4 IPC), or +14.9%.
This is a Zen 5 thread. Besides, it has already been established by Geekbench and SPEC2017 that Zen 3 to Zen 2 is +19%.
Besides, it has already been established by Geekbench and SPEC2017 that Zen 3 to Zen 2 is +19%.
There's some whisper that V-cache variant of Zen5 has higher Fmax than previous Zen4/Zen3.There is a way AMD can surprise with V-Cache (over the normal V-Cache expectation)
Placing V-Cache over the entire CCD die, with ~128 MB of L3. Then, these can be joined using Wafer over Wafer stacking meaning the whole waver of SRAM on N6 on top or the whole Zen 5 CCD, instead of doing it one at the time.
Doing stacking this way would make it easy for AMD to make it a volume part, not a specialty part.
There are already some changes under way with the TSVs needed to connect to V-Cache stacked above. They seem to be missing from L3 area. So, it is possible the TSVs are spread around the die.
Power reduction of Zen 5 might make it possible to cool the chip fully covered with V-Cache - possibly. We are up to 3rd generation of V-Cache, which is a plenty of time for AMD to work on some breakthrough technology to conduct the heat from the CPU die up through the V-Cache
I’m probably going to buy a cheap Zen 5 system and run an IPC comparison myself using proper tests. I’ll post it shortly after launch.This is a Zen 5 thread. Besides, it has already been established by Geekbench and SPEC2017 that Zen 3 to Zen 2 is +19%.
Strix Point is 225mm2, Kraken will be smaller than that.So any guesses on Kraken Point's die size?
Have you done the calculation or is it your gut feeling?Exactly, but you won’t get 19% if you try to do the same thing that you’re doing with Zen 5, it will be lower and by more than what you’re showing for Zen 5. So it seems that trying to apply GB weights to AMD’s IPC benchmark lineup doesn’t make much sense.
Give me a ballpark figure.Strix Point is 225mm2, Kraken will be smaller than that.
Personally I'm always rooting for the company with least market share, as the more equal competition there is, the better it will be for us consumers.According to Apple, N3 sucks. Great for efficiency, but no uplift in performance. Apple would know, they bought the entire run of N3. They had to use the efficiency gains to offset the lack of uplift to increase power to gain more clocks. They should have made M3 more efficient in their design and increased their IPC.
For servers, Turin which is based on N3. It will be just fine because servers run low clocks and are designed for super loads and efficiency.
The clock regression that Zen 5 was supposed to have was due to N3. The clock regression went away because Zen 5 is still based on the 5nm silicon. Albeit a much more advanced process for power and efficiency. Whether the next 3nm TSMC process will be N3P or an N3X that will bring even better efficiency and an uplift in performance. TSMC 3nm is way overpriced currently if you base it on return on investment based on price/efficiency/performance.
Meanwhile the Intel haters are either in denial or ignoring that 20A is right around the corner. 20A will put pressure on TSMC to execute better with their 3nm process. From what I see in the TSMC 3nm pipeline. A Zen 5+ next year on standard N3 looks like the only option. Consider that Intel said they would regain market leadership with 18A. By this I think they are saying they would put AMD and TSMC in their rear view mirror. I am not saying they are right. Intel was comparing 20A to Zen 5 being on N3 3nm TSMC which it will not be.
Let's just say the Arrow Lake CPU should be compared to the Alder Lake release. All new cores and design with a silicon node shrink for both architectures. Intel has never struggled with IPC gains when introducing a new core. We have not seen many Node shrinks from Intel over the years. I totally agree with people when you compared TSMC 7nm and 5nm to the Alder Lake 10nm which is terribly inefficient by comparison.
If any forum members can give us evidence or release notes for Zen 5 silicon, that would be great. It's either on N4, N4P or N4X. It matters what silicon AMD uses for the sake of performance and efficiency. Every since Zen 2, AMD has had an impressive silicon advantage. 7nm TSMC was great for the time. 5nm was very good but not as good considering how great 7nm was. I am not giving all your hope and dreams, gone. Never to be seen again for TSMC or AMD. I think maybe AMD and Nvidia should be asking for discounts from TSMC. Meanwhile, Intel is offering to sell silicon to AMD and others in the future.
Phoenix has 140+ MTr/mm2 vs 118MTr/mm2 for Raphael. They have enough wiggle room for Granite Ridge.Seems like some highly optimized layout to get > 26% density from a minor node shrink
What is odd is that the Z5c really has no significant size change. Looks like a Z5c is 75% of a Z5 (without L3).Re: Turin Dense vs SRF x2
Turin has 50% more cores and 16% more IPC than Bergamo. So 1.74x more throughput in theory.
If N3E offers more than 20% ppw than N5 then I think it'll be fine.
Exactly this was told about Zen 4. You know improving on the first gen...There's some whisper that V-cache variant of Zen5 has higher Fmax than previous Zen4/Zen3.
Please don't tell me you will pair the 9600 with A620M, running at DDR5-5600. Though if you have a 7600 then I suppose that would be fair.I’m probably going to buy a cheap Zen 5 system and run an IPC comparison myself using proper tests.
I wish Intel would've shrunk Raptor Lake Refresh to 20A instead of pushing it wayyyy beyond its limits.But one thing I really would like to see from Intel is socket longevity. All their 115x sockets seemed like planned anti consumerism, which I really don't care for.
If I'm not simply going to add a 10950X3D in my current motherboard sometime in the future, Intel would really have to pull something out of the hat.