ASUS online store is shipping SD Elite X laptops on June 20. Can/Will AMD beat them?They launch next month say the bleeping date.
To be fair, Lisa Su told "in July", we don't know if it's early or late July. Late July at the moment is as valid as a speculation as early or middle of July.Ah good! But I thought GNR itself is for end of July?
It makes more sense that competing sites would run chatbots on the forums 24/7 that constantly inflate threads, derail, post flame bait, and generally try to quietly DDOS the place.Only problem is the main site is basically on life support. So one day it'll be like Beyond3D and the forums will be a fight for survival, whether to shut it down or not since no money is coming from the main site. So put up with the AI written content or ignore them.
With how Recall is getting pounded on. I think if Microsoft is smart they will ditch that before the launch of X Elite.Oh no. Too late
SD Elite X is getting a head start!
yea, about that...With how Recall is getting pounded on. I think if Microsoft is smart they will ditch that before the launch of X Elite.
There's some whisper that V-cache variant of Zen5 has higher Fmax than previous Zen4/Zen3.
That would make sense. If you look at the slides, you'll see that AMD only doubled the L1 -> FP PRF throughput (presumably to accommodate the chonker FP execution units).Quite an easy task to make the IPC 20% for Marketing. Even I can do it. Just add these below
ycruncher
Dolphin
Blender
Moar games
wPrime
GB 5.4 , two online results already show 21%, that too with a nerfed AES XTS score which incidentally was cited as +35% in the Computex info share
Z5 sees weaker uplift in int, the FP is a very solid uplift, similarly front end bound will see solid uplift
Zen 5 vanilla is 3.47mm^2. 4.2 would be a disaster.I'm seeing 3mm2 for Zen 5c and 4.2mm2 for Zen 5, is that right? I'm getting 3mm2 for the Lion Cove core.
There isn't a big area difference between AMD and Intel P cores anymore. Sure, it's on a 50% larger process, but it means they are now in the ballpark, unlike previous generation where Golden Cove was substantially larger.
There is also no frequency gain because I supposed they would have gone for efficiency/density instead of clock speed.
What is odd is that the Z5c really has no significant size change. Looks like a Z5c is 75% of a Z5 (without L3).
I don't get the point of a compact core which only relies on physical optimization and cut down of things like L3 instead of an architecturally distinct design. They could have kept the FP width at 256, like mentioned in the leaked MLID slides.
Seems like a low effort attempt to me.
I used Strix Point shots to do so. It's not clear enough, so it's with the L2 cache included.Zen 5 vanilla is 3.47mm^2. 4.2 would be a disaster.
I don't believe there's public info on Z5C.
My headcanon is still that Mike Clark assumed 3nm, and maybe was counting on something on the order of 22% instead of 16% in that presentation. That would have been received a lot more positively.
I was under the impression that the implication was that due to the node change, certain parts of the "big redesign" were shelved to save die area since they no longer had the luxury of the big shrink.I'm not sure how much a node change would affect IPC. Outside of timing issues and having to possibly run a few parts of the chip slower than they would have liked, the IPC is largely a matter of architecture. If you took an ancient x86 CPU like the original Pentium and ported the design to a modern node it wouldn't magically gain IPC, it would just run faster or at lower power for the same original clock speeds.
If the original targets were actually higher I'd lean more into the notion that discovery of security vulnerabilities was more responsible than using a different node than was originally planned for.
It was never a thing.I was under the impression that the implication was that due to the node change, certain parts of the "big redesign" were shelved to save die area since they no longer had the luxury of the big shrink.
I don't know of the actual viability of that scenario.
I was under the impression that the implication was that due to the node change, certain parts of the "big redesign" were shelved to save die area since they no longer had the luxury of the big shrink.
I don't know of the actual viability of that scenario.
Can someone elaborate why some here think, that the benches are mysterious?! To me it sounds like massive copium. AMD presented 16% IPC increase so that's that. Do you really think they play 4d chess and suddenly present 25% in july or what?! Sounds silly to me.
I don't think it will sell that well even if it is better (and it is not clear that it will be). It'll probably be more expensive at first. And secondly people will hold off because they expect a 9800X3D.It's really not clear how Zen 5 9700x will perform vs. Zen 4 7800x3d, which is why people want to wait for benchmarks.
Because, among Zen 4 sales, 7800x3d outsells all the other Zen 4 CPUs combined (at Amazon).
Considering how much they added, and how much larger the core grew, I'm not really sure what they would have left out or deemed infeasible.
I really don't see them cutting some magic component (or group of them) that delivers another 8% (or more) IPC on top of what they achieved.
If Zen 5 availability is end of July, the reviews might drop ~ July 15.Ah good! But I thought GNR itself is for end of July?
I don't think it will sell that well even if it is better (and it is not clear that it will be). It'll probably be more expensive at first. And secondly people will hold off because they expect a 9800X3D.
I am fairly sure AMD and Intel already reserved some PR event to coincide with SDX availability.If Zen 5 availability is end of July, the reviews might drop ~ July 15.
July 15 is also the availability of some Strix Point models at Best Buy