Basically smart architects say that if the gains aren't bigger than adding more caches, then don't do it. So with Coves, Intel did.That SNC -> GLC jump again... Intel somehow has been pushing a stupidly large L2 cache since WLC. Besides, they hit 6GHz with a minor revision of that core. Zen 4 ate a large portion of that 7nm->5nm transistor budget to run at similar clocks.
Structure sizes is a fair point, I guess. Still, Intel somehow needed to expend these xtors on that L2 to move forward (maybe the higher-latency and higher capacity L2 made it easier to clock the cores higher? SNC -> WLC was a big clock speed jump, but whether the L2 changes played part in it or was it entirely due to node getting better is a tricky question) so I feel that AMD did a reasonable job to achieve this jump. They grew the structure sizes, yes, but at a reasonable area cost.It appears as if it's AMD's largest jump since OG Zen. It's definitely seems like it's AMD's largest architectural rework since then too. Take that as you will.
SNC to GLC's 72% area jump is large, but with context it becomes a bit more reasonable. The L2 capacity for GLC is much larger. Comparing Willow Cove vs GLC, for example, only nets you a 22% area increase.
I actually do believe Zen 4 to Zen 5 is a SNC to GLC level jump, in terms of buffing structure sizes and such.
The jury is still out on whether Intel have actually managed to hit that 6GHz mark given the recent news, I guess.That SNC -> GLC jump again... Intel somehow has been pushing a stupidly large L2 cache since WLC. Besides, they hit 6GHz with a minor revision of that core. Zen 4 ate a large portion of that 7nm->5nm transistor budget to run at similar clocks.
| Structure | Zen 5 vs Zen 4 | GLC vs SNC | CYPC vs SKL |
| Decoder | 2 x 4 decoders vs 4 decoders (+100%) | 6 vs 4 (+50%) | 4 vs 4 (+0%) |
| Uop Cache | 6k* (x2?) vs 6.75K (89%)(+33%)? | 4096 vs 2304 (+78%) | 2304 vs 1536 (+50%) |
| Rename/dispatch | 8 wide vs 6 wide (+33%) | 6 wide vs 5 wide (+20%) | 5 wide vs 4 wide (+25%) |
| ROB | 448 vs 320 (+40%) | 512 vs 352 (+45%) | 352 vs 224 (+57%) |
| INT reg file | 240 vs 224 (+7%) | 280 vs 280 (+0%) | 280 vs 180 (+56%) |
| FP reg file | 384 vs 192 (+100%) | 332 vs 224 (+48%) | 224 vs 168 (+33%) |
I've always wondered why Intel is continuously expanding it's L2 while other companies seem to be much more conservative in this front. As much as it's an area cost, it also would be a decent static power hit as well, no? Which would hurt especially at lower power levels, which is where Intel struggles the most? Idk, I'm no architect.Structure sizes is a fair point, I guess. Still, Intel somehow needed to expend these xtors on that L2 to move forward, so I feel that AMD did a better job to achieve a comparable jump. They grew the structure sizes, yes, but at a reasonable area cost.
🤣The jury is still out on whether Intel have actually managed to hit that 6GHz mark given the recent news, I guess.
The gain brought by doubling the L2 with Zen 4 can be seen in the IPC breakdown. It's nothing to write home about.I've always wondered why Intel is continuously expanding it's L2 while other companies seem to be much more conservative in this front. As much as it's an area cost, it also would be a decent static power hit as well, no? Which would hurt especially at lower power levels, which is where Intel struggles the most? Idk, I'm no architect.
Port is like bandwidth, and it's capacity that takes up space. So it can now be accessed two at a time versus one. 6K is a downgrade, so it's 0.89x.The uop cache is very weird. So it's 6k entries apparently, vs 6.75k entries of Zen 4, but it's dual ported. So is that 12k vs 6.75k? I don't think so, since it can, at most, dispatch 12 uops per cycle, and Zen 4 can do 9, for a +33% increase, but who knows how many uops per cycle Intel's Uop caches can do...
Caches are easy way to improve performance? The others require thinking.I've always wondered why Intel is continuously expanding it's L2 while other companies seem to be much more conservative in this front.
15% decrease is nice.Lol, he s telling you the opposite of the truth, i wonder why...
Sure it is, if enhancing the Fetch and BPU for Zen 5 brought just 2%. Caches are actually quite power efficient for their size, and if you need it, it's a great increase in perf/watt because it keeps it away from system memory. If you looked at power distribution for older server processors(Itanium, Power), then 80% is taken up by logic and caches are like 5W.I find that unconvincing, increasing the L2 isn't really improving PPC that much....
While the actual performance didn't improve, new processes always bring capacitance reduction for power reduction. They were able to go from 24 EU to a 64 EU GPU at the same power, so there was that. So unlike the heydays of Moore's Law, the gains aren't always uniform throughout the blocks on the SoC, and it requires extra work to take advantage of it too.We are getting a bit off topic here but I think Icelake's 10nm didn't bring much, if any, perf/watt improvements,
That s the thermal resistance between the surface of the die to the external surface of the IHS.15% decrease is nice.
Just curious though, was it measured for the junction-to-heatspreader path, or including some reference heatsink.
I can see this. There's a lot of commonality between Zen 2 and Zen 6, namely new packaging, new node, refinement of the prior architecture (which introduced big changes).I have a feeling that Zen 6 may analogize well with Zen 2, and Zen 7 with Zen 3.
I never take marketing slides at face value. From ANY company.Ma fault, I should always take AMD marketing for their word. They have surely never lied before!
Top tier cope smh.
My only guess is that 9950X will surprise at $499.So based on what we know from today's info w.r.t. performance etc, anyone that wants to speculate on pricing?
9950X: ?
9900X: ?
9700X: ?
9660X: ?
Also, bear in mind that rumor is that X3D models will hit the market soon after regular X, and Intel ARL-S soon thereafter.
$649, $499, $349, $269 would be my guess.So based on what we know from today's info w.r.t. performance etc, anyone that wants to speculate on pricing?
9950X: ?
9900X: ?
9700X: ?
9660X: ?
Also, bear in mind that rumor is that X3D models will hit the market soon after regular X, and Intel ARL-S soon thereafter.
I'm not convinced the clustered decode on Zen 5 works well on ST. David Huang got zero from his ST tests, but AMD is saying otherwise. Many times(not always) real tests show results falling short of manufacturer claims, probably because they missed the target. It sounds like it isn't even Tremont level.
The bottom sounds like it's for clustered decode
-From 1x 9-way uop to 2x 6-way uop output.
-2-taken, 2-way TAGE predictor
-L1 fetches 2x32B
Saying it's "6 ALUs" are little bit misleading as saying Skymont doubled to "8 ALUs". Most ALUs added in both architectures are simple ALUs. "BR" on ALUs for Zen 5 means Branch, meaning simpler functions than the multiply for the three. Same for FP. 2 out of the 6 FPUs are Stores, again not much.
Double L1 bandwidth means capabilities of the Load units are doubled.
AMD didn't say anything about increased BTB sizes. Usually, that is the big deal.
I think those prices are too high. There would be no reason to keep high pricing a secret so close to launch, those prices won't meaningfully eat into the fire sale prices of Zen 4, like the $465 7950X3D, $310 7900X3D, etc.$649, $499, $349, $269 would be my guess.
That's the entire point. AMD wants to clear the remaining stock of Zen 4 chips first.I think those prices are too high. There would be no reason to keep high pricing a secret to close to launch, those prices won't meaningfully eat into the fire sale prices of Zen 4, like the $465 7950X3D, $310 7900X3D, etc.
I would think they're keeping the pricing a secret because it's low enough it will affect Zen 4 sales.
Do you have an alternative explanation as to why pricing being kept a secret so close to launch?That's the entire point. AMD wants to clear the remaining stock of Zen 4 chips first.
Zen 5 will have an undisputed performance crown for a few months. There's no way they would sell the 16C part for anything less than $600, and given their recent history I'd be surprised to see Zen 5 cheaper than Zen 4 launch MSRP by anything more than $50.
I'd like to believe they will have some super agressive pricing, but the last time that happened was Zen 2. I think they are in a position to do it, but the corporate push to maximize profits and the uncontrollable urge to capitalize on early adopters will win out. If you consider they are selling a 3 die (plus fillers) 7800X3D for $379 right now, theres basically no reason they couldnt hit with a $329 9700X and still profit.I think those prices are too high. There would be no reason to keep high pricing a secret to close to launch, those prices won't meaningfully eat into the fire sale prices of Zen 4, like the $465 7950X3D, $310 7900X3D, etc.
I would think they're keeping the pricing a secret because it's low enough it will affect Zen 4 sales.
Intel is in such a weak position thanks to the current debacle, competitive pricing out the gate for the new gen would probably turn a lot of heads.
Waiting for the RPL situation to unfold to decide how much can they gouge consumers.Do you have an alternative explanation as to why pricing being kept a secret so close to launch?
Zen 4 pricing was announced with SKU's 1 month prior to launch
RDNA3 pricing was announced with SKU's 1 month prior to launch
Zen 3 pricing was announced with SKU's 1 month prior to launch
RDNA2 pricing was announced with SKU's 1 month prior to launch
I didn't bother looking back any further, I feel this is enough to establish a pattern.
Even though Zen 4 X3D launched 5 months after Zen 4, they didn't change MSRP on any of the Zen 4 SKU's, only retailer discounts. I believe if AMD is going to launch Zen 5 X3D in September as rumored, they will not price up Zen 5 and price cut/aggressively discount only 2 months later. I think they're going to price the Zen 5 SKU's in their final place in the lineup around where the X3D SKU's will land.I'd like to believe they will have some super agressive pricing, but the last time that happened was Zen 2. I think they are in a position to do it, but the corporate push to maximize profits and the uncontrollable urge to capitalize on early adopters will win out. If you consider they are selling a 3 die (plus fillers) 7800X3D for $379 right now, theres basically no reason they couldnt hit with a $329 9700X and still profit.
What the pricing SHOULD be at launch IMO:
$549 - 9950X
$449 - 9900X
$329 - 9700X
$249 - 9600X
What it will probably be:
$649 - 9950X
$499 - 9900X
$379 - 9700X
$299 - 9600X
We are two weeks before the review embargo supposedly falls. At this point, marketing slides are unlikely to show projections which the real product will miss. (That's one kind of claims which you perhaps refer to when you talk about having been lied to.) At most I expect that their end note slides gloss over potentially important details of their claims by now. (If this is something which you'd call lying too.)Ma fault, I should always take AMD marketing for their word. They have surely never lied before!