Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

Page 669 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

Det0x

Golden Member
Sep 11, 2014
1,220
3,800
136
Is 3600uclk and 2400fclk possible or is the italian guy delusional ?
I already gave my opinion in post #16459

I can accept he thinks he is running 2400mhz FCLK and/or buggy bios is showing him 2400mhz FCLK, but i dont think the system is actually running that in reality..
But its also very easy to prove me wrong, he just could post some read/write/copy numbers from aida or even better clam cache/mem benchmark @ 2000mhz, 2200mhz and 2400mhz FCLK so we could see the scaling (he have no NDA right?)
(Zen4 and now Zen5 is pretty much all bandwidth limited by FCLK)

He can use this is a comparison for what maxed out 2200mhz FCLK on a dual CCD cpu should look like (12 vs 16 core count show not matter in this regard)

6600MT/s 1:1


8000MT/s 2:1
 
Last edited:

Josh128

Senior member
Oct 14, 2022
286
402
96
So Italian dude with 9900X runs a few gaming tests with a "questionable" memory setup and thats it? Radio silence since then? At least throw us some more crumbs, bro, even stale ones, lol. People better hope I never manage to snag such an early unit and not be under NDA like him. There would be a lot of pissed off tech news outlets out there...
 

gaav87

Member
Apr 27, 2024
117
154
76
So Italian dude with 9900X runs a few gaming tests with a "questionable" memory setup and thats it? Radio silence since then? At least throw us some more crumbs, bro, even stale ones, lol. People better hope I never manage to snag such an early unit and not be under NDA like him. There would be a lot of pissed off tech news outlets out there...
Funny thing i got hands on 5600x on 31th oct 6days before official release. And litteraly noone was interested back then xD I think i only got a mention on VC or WCFKEK
Look at the date https://valid.x86.fr/rsf5p1
I asked the italian guy if he can show aida64 with 2400fclk or come here on the forum xD
 

Attachments

  • EloQ-b8XYAAIpzD.jpg
    131 KB · Views: 31

Hail The Brain Slug

Diamond Member
Oct 10, 2005
3,479
2,403
136
It's called transparency.
With no official reviews performed with potentially defective units and no retail sales to consumers of potentially defective units, there's very little reason for transparency. AMD has not "wronged" anyone, only delayed a product release a short time. They very well could have delayed it with no statement at all.
 

Hans Gruber

Platinum Member
Dec 23, 2006
2,297
1,212
136
The first rule of fight club/CPU forum is attack the post not the poster. No personal attacks.
With no official reviews performed with potentially defective units and no retail sales to consumers of potentially defective units, there's very little reason for transparency. AMD has not "wronged" anyone, only delayed a product release a short time. They very well could have delayed it with no statement at all.
Is AMD paying you for your statement? Or are you an AMD voluntary public service agent here on the forum?

Hans, you are not supposed to JUMP out of Nakatomi Plaza. One week vacation. Aloha!

Mod DAPUNISHER
 
Last edited by a moderator:

Hitman928

Diamond Member
Apr 15, 2012
6,036
10,360
136
It's called transparency.

Should every company always put out a statement and compare measurements every time they find an issue with an unreleased product? What a weird request. No one is owed "transparency" for all the work, debugging, and validation that happens with unreleased products. AMD said they discovered an issue (in testing), it's been resolved, and good product will be delivered with a very small delay. As long as the released products are good, there will be nothing to add to the story.
 
Jul 27, 2020
19,613
13,477
146
TSMC dictates the prices not Apple. Anyway, if you believe so show some proof that that Apple is increasing the price of TSMC nodes.
It's common sense logic. Who buys up capacity in bulk, years in advance and who has loads of cash and still makes loads more through their uniquely demented userbase? Out of all of TSMC's customers, that's Apple. They may have done a service to mankind by enabling TSMC to do accelerated R&D for the invention of advanced process technologies because of Apple's needs but they are also the ones who promoted TSMC to becoming a monopoly. Apple is like oxygen. A necessary evil. Too much leads to oxidation and accelerated aging and not enough halts future progress. I love *some* things about them but I hate way more about them than I love about them.
 
Reactions: Thibsie
Jul 27, 2020
19,613
13,477
146
Maybe they really are waiting for the 14900K fix so they truly can obliterate them in launch benchmarks.
YES.

BINGO!

Now that's a logically possible motive behind AMD's decision. The greater the average performance percentage difference, the better Zen 5 looks to the public!

AMD should've just said so.

"We regret to inform you that we don't feel this is the right time to publish Zen 5 benchmarks. We will wait for our dear competitor to get their act together before we thoroughly embarrass them".
 

StefanR5R

Elite Member
Dec 10, 2016
5,889
8,758
136
Ian said that Zen 5c would see a much smaller drop in frequencies compared to what Z4c had relative to the classic cores.
Interesting.
Well, this expected if they talk about Epyc : 4nm vs 3 nm
No. AMD said this during the post-tech-day briefing in the context of Strix Point's N4P Zen 5 cores and N4P Zen 5c core sizes, the latter being just 25% smaller than the former. (Whereas the difference was 35% between Phoenix 2's Zen 4 and Zen 4c cores.) These lowered space savings are because AMD had to work within stricter constraints WRT Voltages and clocks in order to make the compact cores work as a support to the classic cores the way as AMD wanted them.
(Source: Computerbase's article on this briefing. Also take Tom's Hardware's interview with Mike Clark in which the Zen 5c design targets are discussed in the context of heterogeneous CPUs, read: Strix Point. PS, I haven't watched the Cutress X Cozma video.)
 

StefanR5R

Elite Member
Dec 10, 2016
5,889
8,758
136
BINGO!

Now that's a logically possible motive behind AMD's decision.
Okay... AMD are lying publicly when they say that they had a QA issue with the first batch. From this follows that they are either going on lying publicly by saying that they are recalling the first batch from their channel partners, or it follows that they are happy to sink the cost of the product recall just for the nicer comparison in reviews.

Further, according to you guys, AMD either has the power to make Intel publish their microcode update several days before August 8 when single-CCD Ryzen 9000 go on sale and the corresponding review embargo ends. Or AMD had told another lie and they will delay and delay the sales start and embargo for as long as Intel hasn't published the finalized microcode.

All very logical.
 
Reactions: MoistOintment

Goop_reformed

Senior member
Sep 23, 2023
307
337
96
YES.

BINGO!

Now that's a logically possible motive behind AMD's decision. The greater the average performance percentage difference, the better Zen 5 looks to the public!

AMD should've just said so.

"We regret to inform you that we don't feel this is the right time to publish Zen 5 benchmarks. We will wait for our dear competitor to get their act together before we thoroughly embarrass them".
Nah. If that is the case they wouldn't have to reexamine the entire current inventory.
 
Jul 27, 2020
19,613
13,477
146
Nah. If that is the case they wouldn't have to reexamine the entire current inventory.
OK, you are telling me that they will get the CPUs back, every single one of them, run them through their QA test gauntlet and get them back on shelves ON August 8th for the single CCD CPUs????

Please, please THINK about that for a second.

Doing that FOR all shipped CPUs regardless of region or territory means they have testing facilities in every region within reach. Please tell me that you don't believe that to be true because that would be ABSURD. Even Intel doesn't have that.
 
sale-70-410-exam    | Exam-200-125-pdf    | we-sale-70-410-exam    | hot-sale-70-410-exam    | Latest-exam-700-603-Dumps    | Dumps-98-363-exams-date    | Certs-200-125-date    | Dumps-300-075-exams-date    | hot-sale-book-C8010-726-book    | Hot-Sale-200-310-Exam    | Exam-Description-200-310-dumps?    | hot-sale-book-200-125-book    | Latest-Updated-300-209-Exam    | Dumps-210-260-exams-date    | Download-200-125-Exam-PDF    | Exam-Description-300-101-dumps    | Certs-300-101-date    | Hot-Sale-300-075-Exam    | Latest-exam-200-125-Dumps    | Exam-Description-200-125-dumps    | Latest-Updated-300-075-Exam    | hot-sale-book-210-260-book    | Dumps-200-901-exams-date    | Certs-200-901-date    | Latest-exam-1Z0-062-Dumps    | Hot-Sale-1Z0-062-Exam    | Certs-CSSLP-date    | 100%-Pass-70-383-Exams    | Latest-JN0-360-real-exam-questions    | 100%-Pass-4A0-100-Real-Exam-Questions    | Dumps-300-135-exams-date    | Passed-200-105-Tech-Exams    | Latest-Updated-200-310-Exam    | Download-300-070-Exam-PDF    | Hot-Sale-JN0-360-Exam    | 100%-Pass-JN0-360-Exams    | 100%-Pass-JN0-360-Real-Exam-Questions    | Dumps-JN0-360-exams-date    | Exam-Description-1Z0-876-dumps    | Latest-exam-1Z0-876-Dumps    | Dumps-HPE0-Y53-exams-date    | 2017-Latest-HPE0-Y53-Exam    | 100%-Pass-HPE0-Y53-Real-Exam-Questions    | Pass-4A0-100-Exam    | Latest-4A0-100-Questions    | Dumps-98-365-exams-date    | 2017-Latest-98-365-Exam    | 100%-Pass-VCS-254-Exams    | 2017-Latest-VCS-273-Exam    | Dumps-200-355-exams-date    | 2017-Latest-300-320-Exam    | Pass-300-101-Exam    | 100%-Pass-300-115-Exams    |
http://www.portvapes.co.uk/    | http://www.portvapes.co.uk/    |