Then they might as well buy EPYC CPUs.The companies buying TR CPUs are doing it for their professional engineers designing semiconductor chips or simulating stresses on mechanical designs, 3D design and rendering artists, etc... The cost of the machine pales in comparison to the cost of paying those people.
They’ve downgraded to a 4C CPU since they heard that ST perf is all that matters. 🤣Also, what's up with these slow ass forums? Anyone else having issues?
what are you on about , TR is an EPYC platform , you know they have multiple platforms for different targets........Then they might as well buy EPYC CPUs.
It’s questionable whether the volume of TR CPUs sold is sufficient to justify their existance going forward. DT + EPYC could be sufficient, if split so DT is up to 32C and above that EPYC (for Zen 5/6). Then no need for a separate tiny TR niche category squeezed inbetween.
They’ve downgraded to 4C CPUs since they heard that ST perf is all that matters. 🤣
So 6 cores zen 5 performs about the same as 8 cores zen 4. 1-6/8 = 25%. HmmmmWell it ain't gonna change anything since he's getting a $349 6 core in but a few months.
Are you sure?So 6 cores zen 5 performs about the same as 8 cores zen 4. 1-6/8 = 25%. Hmmmm
Strix Halo, first and foremost is about enabling laptops designs that are impossible with CPU+dGPU designs.Will Strix Halo iGPU actually be more efficient than a dGPU?
According to rumours, total SoC TDP for Strix Halo is 125W. Not sure how much of that is the GPU, but I have a feeling that the GPU is going to be less efficient than say... a low wattage RTX 4070 for example.
Yes yes. I know the drill.Strix Halo, first and foremost is about enabling laptops designs that are impossible with CPU+dGPU designs.
What is MALL?The config is RDNA3.5 2SE/4SA/20WGP, 32MB of MALL and 256-bit LPDDR5X-8533 for 270GB/s of membw. N4P is presumed and maximum GPU power is 125W.
4070M 125W gets smashed???I'll assume a 5% IPC increase and +20% clocks at iso power/-40% power at iso clocks vs N31/32. The closest parts are either the 7700XT or the good old 6700XT.
Using these numbers I think it can hit 7700XT clocks at ~110W, adding for IPC and an extra clock bump I will put final STX-Halo GPU performance @125W at 85% of the 7700XT. That places performance as similar to Navi22, which has the same core config at slightly over half the power.
The 4070 is a fatter part, at 125W it would probably be faster, though the numbers I have chosen are conservative without knowing STX1 numbers yet and knowing how bad clock/power scaling is on RDNA3.
4070M on the other hand would be smashed, which is the far more relevant comparison.
Memory Attached Last Level aka Infinity Cache.What is MALL?
Infinity Cache, if you rather, the memory attached last level cache which is L3 in this case.What is MALL?
WLE is a glorified mobile benchmark, also only a single point of data. 780M is consuming way less power here and would get increasingly memory bottlenecked at higher power.4070M 125W gets smashed???
4050M 60W is already 3x perf of 780M.
View attachment 920894070M 125W will be atleast 2x that of the 4050 here. Hence 6x the 780M.
About 15% behind on average from what I've seen. Lends very high confidence to Strix Halo beating the 4070M handily.Strictly using Timespy, the average 4070M is like 10% faster than the average 40 CU 6800M. Course that's RDNA2, but I also don't think the power draw of the average Strix Halo laptop is going to be that high either. Like I'd expect it to be like 65 W max.
Logic density gains only slow down with smaller nodes, and memory density already is not scaling with smaller nodes.And in 5 years advanced nodes will be so dense and also relatively cheap that this sounds like a joke
People have constantly said node prices are increasing yet compute-per-dollar has only gone up as time goes on. For most people in 2018, 7nm and 5nm sounded like myths, and here we are in 2024 with relevant foundries steaming ahead to angstrom scale.
RX 6500M has 64 bit memory bus, with 128 GB/s bandwidth, which means its close to 780M Bandwidth. With 6400 MHz DDR5 780M has 102 GB/s bandwdith available, which should be enough for it to be close to 6500M, right?Yes yes. I know the drill.
What is MALL?
4070M 125W gets smashed???
4050M 60W is already 3x perf of 780M.
View attachment 920894070M 125W will be atleast 2x that of the 4050 here. Hence 6x the 780M.
Strix Halo GPU vs Radeon 780M;
• 3.33x the CU count
• RDNA3.5 (vs RDNA3)
• N3E
• 273 GB/s
Based on these, I think we can optimistically say Strix Halo GPU will be like 4x-5x that of 780M.
remember the 780M is sharing the banwidth with the CPU, so the actual bandwidth could be considerably lower than that.RX 6500M has 64 bit memory bus, with 128 GB/s bandwidth, which means its close to 780M Bandwidth. With 6400 MHz DDR5 780M has 102 GB/s bandwdith available, which should be enough for it to be close to 6500M, right?
It isn't. 6500M is 50% faster GPU than 780M, solely thanks to 16 MB of Infinity Cache.
Strix Halo will have 32 MB of Infinity Cache, which will be available above 256 bit LPDDR5 bus and 270 GB/s bandwdith.
It will easily be competing with 4070M, because all of the bottlenecks should be alleviated because of the Infinity Cache.
Then they might as well buy EPYC CPUs.
It’s questionable whether the volume of TR CPUs sold is sufficient to justify their existance going forward. DT + EPYC could be sufficient, if split so DT is up to 32C and above that EPYC (for Zen 5/6). Then no need for a separate tiny TR niche category squeezed inbetween.
CFET, TMD and 3D stacking. Biggest problem going forward is cost, the "free lunch" aspect of Moore's Law is over.Logic density gains only slow down with smaller nodes, and memory density already is not scaling with smaller nodes.
I wonder where will come those massive gains in density to maintain moore's law? Magic? Vibranium Wafers?
What solely thanks to 16MB IC, that's not true.RX 6500M has 64 bit memory bus, with 128 GB/s bandwidth, which means its close to 780M Bandwidth. With 6400 MHz DDR5 780M has 102 GB/s bandwdith available, which should be enough for it to be close to 6500M, right?
It isn't. 6500M is 50% faster GPU than 780M, solely thanks to 16 MB of Infinity Cache.
It's interesting how both you and @branch_suggestion already know that It will easily compete or beat 4070M without even knowing IGP's frequency.Strix Halo will have 32 MB of Infinity Cache, which will be available above 256 bit LPDDR5 bus and 270 GB/s bandwdith.
It will easily be competing with 4070M, because all of the bottlenecks should be alleviated because of the Infinity Cache.
Of course, but I was not not talking about the low-end TR models at 12/16C. But those that mainly need more PCIe lanes can also get a low-end Epyc.Also, the market for low-end TR is, and has always been, customers who need more PCIe, not customers who need more threads. 32C AM5 would be useless for them.
Yea that's easy.4070M 125W gets smashed???
Yeah kinda the point of shipping console SoCs in laptop.Will Strix Halo iGPU actually be more efficient than a dGPU?
What I mean by this, is that the end result in perf difference is much bigger than just by counting CUs/ALUs, Clock frequency and memory bandwidth, even added up.What solely thanks to 16MB IC, that's not true.
6500M/6550M has 25/41% higher BW than 780M even without IC and It's not shared between CPU and IGP.
Both of them also have 33% more CU than 780M
We're talking about the highest end TDP configuration. And that should easily compete/beat 4070M, thanks to IC. In essence, what Strix Point Halo needs to do to compete or beat 4070M is to achieve 6850M performance.It's interesting how both you and @branch_suggestion already know that It will easily compete or beat 4070M without even knowing IGP's frequency.
Maybe China will one day save the Moote's LawReverse Moore's law. No we're not seeing that yet. Stagnated Moore's law is bad enough.
You mean if/when China is able to produce chips on latest node using only China developed tech?Maybe China will one day save the Moote's Law
They won't because there is no Moote's law.Maybe China will one day save the Moote's Law
Not likely in our life time under the current administration. ASML is the ace the West holds tightly to their chest.You mean if/when China is able to produce chips on latest node using only China developed tech?