Would items like reduced latency from the new packaging be included in the IPC number though? That's what I'm curious about. Core could be 10% but benefits from IOD and packaging impact on performance might not be...
Would items like reduced latency from the new packaging be included in the IPC number though? That's what I'm curious about. Core could be 10% but benefits from IOD and packaging impact on performance might not be...As @Hitman928 stated the profiling of Zen 5 done so far had revealed the frontend bandwidth - decoders busy, uOp busy - is NOT the bottleneck. The frontend latency - a L1i cache miss, fetch after a mispredicted branch, ITLB misses, etc. - often is.
So doubling the decoder width won't help that much.
The slide contains marketing speak since the slide was not internal but presented under NDA. This means they definitely do not need to sandbag or anything like that.
* For the then-existing gens, they list real the marketing IPC figure.
* For Zen 5 they listed 10-15+% IPC goal
* For Zen 6 they listed 10+% IPC goal
Compare Zen 5 with Zen 6. If they knew the IPC goal would be higher than 15%, they would present it as such. Higher is better. But they did not.
Physics and economics apply to ARM as well. I disagree.Note: This problem only applies to x64 in the near term. Apple and ARM will keep delivering decent improvements every year until they hit the power and frequency wall. Probably only a few years later but still.
Indeed, doubling the GPRs would help in many situations and mostly across the board.With greatly diminishing probability for each +1%, where as 10%+ makes it very likely to be in range of 10-15% (mid is only 12.5%), but a lot less so to be in 10-20%
Since Zen 5 underperformed (I reckon dual branch predictor not working as intended so in effect it's less wide than Zen 4) - if that's fixable and gets fixed in Zen 6 then maybe we will see better improvement than on that slide.
I'll be happy if they add Intel APX to it
On a plus side - if they do so well with 4-wide decoder and another one disabled in non-SMT mode, then imagine how much better it will be with just 5-wide decoders? Maybe primary (most likely branch) decoder should be 5-6 wide and secondary is 4-wide...
I think that a new IOD and faster memory will Open up some use cases so that fixing the decoder will actually help.From the (granted limited) publicly available profiling done on Zen 5, the decoder width was seldom the bottleneck for the Zen 5 core.
But less immediately when their performance per watt is 3x AMD and Intel. How else did Apple go from merely matching Zen 3 with M1 to eclipsing Zen 5 by 15% (or more) with M4? It's easier for them to boost clock rates than it is for AMD/Intel to find IPC improvements.Physics and economics apply to ARM as well. I disagree
Register renaming solves different problem. Compiler does not know your register file has hundred entries, as this is an implementation detail, it will spill as soon as you run out of architectural GPRs (16 for x64, 32 for aarch64, 32 for x64 + APX)Indeed, doubling the GPRs would help in many situations and mostly across the board.
It was my understanding that x86 had mitigated this mostly though through the use of extended registers and register renaming?
Yeah, I think MT throughput doesn't figure into IPC calculations. IPC is usually related to the ST throughput. Reduced latency and higher internal bandwidth could allow the cores to work even better together.Would items like reduced latency from the new packaging be included in the IPC number though? That's what I'm curious about. Core could be 10% but benefits from IOD and packaging impact on performance might not be...
N3E is lovelyBut less immediately when their performance per watt is 3x AMD and Intel. How else did Apple go from merely matching Zen 3 with M1 to eclipsing Zen 5 by 15% (or more) with M4?
It was my understanding that x86 had mitigated this mostly though through the use of extended registers and register renaming?
Register renaming solves different problem. Compiler does not know your register file has hundred entries, as this is an implementation detail, it will spill as soon as you run out of architectural GPRs (16 for x64, 32 for aarch64, 32 for x64 + APX)
Possibly, but like I said: cost concerns impact ARM less because the phone market justifies designing the core for the latest processes. Physics are the same for both of them but their design allows them to avoid some of the worst of it (for now).N3E is lovely
I disagree - mobile market is slowing down, new stuff just isn't offering a lot better features, and it's got REALLY expensive too - not just Apple phones, Samsung also on same high level. The whole mobile market most likely peaked - it's already switched to model of "sell old stuff that retained value OKish", that's like car used market, we might see the same with GPUs going forward.cost concerns impact ARM less because have the phone market
Go plot the GB6 1T or SPECint scores of A and X series. It really isn't slowing down like x64. ARM might suck at it doing it in a decent area but their "partners" are doing better.I disagree - mobile market is slowing down
The market is slowing down - people can't drop grand and a half on new toy every year which isn't much different than the one they've got, purchase cycles increased, the "AI" stuff isn't working yet to get people buying.It really isn't slowing down like x64
Yeah, it's amazing what one can do when selling 200 mln+ premium devices per year - personally I'd prefer if they got battery life in my iPhone to 7 days.Go plot the GB6 1T or SPECint scores of A and X series
Most x86 users won't care. At most, they will get an ARM device to "feel" the snappy performance of the latest ARM SoC from whoever. The number of x86 power users who will ditch their existing x86 device and go full ARM is going to be miniscule especially if they are not mobile warriors.Zen 6 is a 10% generation so I'm pretty sure AMD won't even catch up to M4 by 2026.
What's your use case?P.S. I am a very happy Apple M4 user.
I didn't say anything about the death of x64. Just an argument that ARM vendors will not slow down until later while the x64 vendors already have:Most x86 users won't care. At most, they will get an ARM device to "feel" the snappy performance of the latest ARM SoC from whoever. The number of x86 power users who will ditch their existing x86 device and go full ARM is going to be miniscule especially if they are not mobile warriors.
For ARM to cause the premature death of x86, it needs to offer at least 90% emulated x86 performance. Some may even be OK with 50% emulated performance, as long as the emulation is so robust and solid that it runs almost any x86 executable flawlessly, save for the odd ones.
I think we need to start getting used to smaller improvements and longer times between generations. Damn Physics!
Note: This problem only applies to x64 in the near term. Apple and ARM will keep delivering decent improvements every year until they hit the power and frequency wall. Probably only a few years later but still.
They can't keep going forever. They will hit a plateau sooner or later but yes, there is a good chance that they may leave the x86 players quite behind and then those players will spend quite sometime catching up. It's actually good for x86 because ARM is showing them that more performance is within reach. Lunar Lake's performance is miraculous compared to Meteor Lake and we probably wouldn't have seen it materialize without M1.Just that the argument that ARM vendors will not slow down until later while the x64 vendors already have:
They'll slow down once they run out of clock bumps. Whatever.Just an argument that ARM vendors will not slow down until later
It is definitely later. x64 plateaued in 2024.hey will hit a plateau sooner or later but yes
Yep. But that's a lot of room compared to AMD.They'll slow down once they run out of clock bumps. Whatever.
Yeah, the M6 Max.If Zen 6 goes 24C/48T or even 20C/40T, is the ARM camp gonna have a competitively priced MT monster to challenge it?
Come on. That's anything but competitively priced. Apple has no interest in competing. They go directly for the "I don't know how but I keep getting richer" crowd.Yeah, the M6 Max.
Come on. That's anything but competitively priced. Apple has no interest in competing. They go directly for the "I don't know how but I keep getting richer" crowd.
That's mostly of interest to developers at this point. Apple isn't even trying seriously to entice studios to port their games to Apple Silicon. Like maybe offering to cover 50% of the porting costs for only AAA games, for start. They have the money but don't want to spend it because they are haunted by Steve Jobs' ghost at night if they try to think seriously about targeting the games industry.It includes a GPU of about ~400mm2 of leading edge silicon with raytracing and AI acceleration. How much will that cost in 2026/2027? Jensen's Pricing Law suggest $1500 to $2000 alone.
Not the subject of this thread nor do I care.That's mostly of interest to developers at this point. Apple isn't even trying seriously to entice studios to port their games to Apple Silicon. Like maybe offering to cover 50% of the porting costs for only AAA games, for start. They have the money but don't want to spend it because they are haunted by Steve Jobs' ghost at night if they try to think seriously about targeting the games industry.
Typical tablet - browsing, video watching, works great, potentially it can do 10x perf editing videos and stuff, but I don't use it for that - would have preferred to cut those bits off and save on battery life!What's your use case?
Zen 6 is a 10% generation so I'm pretty sure AMD won't even catch up to M4 by 2026.
Not really. Apple mobile is just 600MHz lower than Strix now.But that's a lot of room compared to AMD.
Oh come on. Who forgets the frequency like that.Zen 6 is a 10% generation