Ok, so it follows Zen 5 gets away with 1T 4 wide decoder and does pretty decent job at it, and Lion Cove got 8 wide and is hardly better - what gives?
Because decode is hardly the limit for x86 cores. Any cores really.Ok, so it follows Zen 5 gets away with 1T 4 wide decoder and does pretty decent job at it, and Lion Cove got 8 wide and is hardly better - what gives?
Ok, why did they make Lion Cove with 10 wide decoders, I thought going that wide was pretty expensive transistor wise?Because decode is hardly the limit for x86 cores.
AMD invests a bit more transistors in uOp cache. Intel invests in decoders.Ok, why did they make Lion Cove with 10 wide decoders, I thought going that wide was pretty expensive transistor wise?
It's 8-wide but IDC is incompetent so whatever they do matters not.Ok, why did they make Lion Cove with 10 wide decoders, I thought going that wide was pretty expensive transistor wise?
Aa64 is still a far cleaner ISA so not really?Great, so if decoding variable length x86 ops is not a problem, then ARM's main argument about x86 in-efficiency is gone?
It is not "not a problem", as it makes decoders more complex and has to be alleviated with big op caches. However, variable lengths of x86 ops isn't as big as a problem to make 2025 the year in which AARCH64 made x86-64 obsolete. Or x86-32 even.Great, so if decoding variable length x86 ops is not a problem, then ARM's main argument about x86 in-efficiency is gone?
With Intel failing so badly why should AMD try hard with Zen 6?
ARM has been coming for a while. CSPs are pushing their in-house ARMs a lot. Nowadays, it doesn't make sense to run majority of AWS services on anything else than the 'g'-suffixed instances. This cuts the share from both AMD and Intel.Because there is ARM coming.
It is not just decoding, the instruction set architecture also matter. Since ARM have more general purpose registers, there are more opportunities to execute code in parallel (Register rename is only a partial solution). Thus more wider designs are possible.Great, so if decoding variable length x86 ops is not a problem, then ARM's main argument about x86 in-efficiency is gone?
See there's a problem in this statement.when ARM increases performance by 20% in 2 years at minimum.
It's not in-house. It's Neoverse. Aka ARM subsidizing demand by doing all the hard work and taking no money in return.CSPs are pushing their in-house ARMs a lot. Nowadays, it doesn't make sense to run majority of AWS services on anything else than the 'g'-suffixed instances. This cuts the share from both AMD and Intel.
Mega irrelevant meme.Since ARM have more general purpose registers, there are more opportunities to execute code in parallel (Register rename is only a partial solution).
Tf does that mean?Another thing, many ARM processors also have specialized accelerators.
Royal Core was wider than literally any design shipped evah by anyone and that was still good ol' smelly x86.Thus more wider designs are possible.
16GPRs haven't been the limit like ever.Care to explain?
It is, if you do assembly programming you will know.16GPRs haven't been the limit like ever.
There's a problem in this statement.ARM has generally been able to get that increase, if it stops now it's another thing, AMD will for sure not be banking on that, it would be irresponsible.
compiler explorer is a wonderful thing you should use instead of poasting this.It is, if you do assembly programming you will know.
Well, I am limited by them in my SIMD code Or maybe not strictly limited but if I had more GPRs I could use faster loads/store (without complex addressing). Another thing is that many people disable frame pointer making debugging harder to get one more usable GPR so while adding more of them will not make x64 beat M cores it will for sure make some code faster and lives easier as there no longer will be a need to omit frame pointers.16GPRs haven't been the limit like ever.
Here's my take on that, which is a great point BTW.Because there is ARM coming.
Yeah you might think it will never take off on Windows or in Servers whatever, but it's just a matter of performance per year. AMD cannot afford to, for example, only increase performance by 10% every 2 years when ARM increases performance by 20% in 2 years at minimum. This is one of the reasons why AMD will not sit still, x86 had a huge advantage against ARM 10 years ago, it's not the case anymore, sitting still is not an option.
ACTUALLY, https://windowsonarm.org/?status=0The real question is why Microsoft doesn't port Windows over to ARM now. Bring along their applications and right off the bat those systems would be good to go for many business users. That would be a SERIOUS threat to AMD and Intel.
No one wants ARM.AMD has the capability to actually cause massive damage to Intel's marketshare thanks to their in-house unreleased ARM design. What if they release their ARM SoC with even just a single Zen6c core for accelerating the emulation of legacy x86 code? Outside of outdated multithreaded software, that will cover almost all x86 applications that are single threaded or poorly threaded while the popular software will just get rewritten for the newer ARM cores.
No one knowledgeable. The sheep don't care which is what the majority are. Remember M$ Office having both 32 bit and 64-bit setup files but most people being content with the default 32-bits because they didn't know any better? ARM will sell once it gets to a reasonable price point and the software compatibility issues will become secondary once most popular software is recompiled. If this weren't a possibility, AMD wouldn't have expended resources preparing for it.No one wants ARM.
Again, LNL is a proof that all you need is a good SOC.No one knowledgeable. The sheep don't care which is what the majority are. Remember M$ Office having both 32 bit and 64-bit setup files but most people being content with the default 32-bits because they didn't know any better? ARM will sell once it gets to a reasonable price point and the software compatibility issues will become secondary once most popular software is recompiled. If this weren't a possibility, AMD wouldn't have expended resources preparing for it.
Technically, it's not possible to mix different core types each with different ISA in the same SoC just like that. That single x86 core cannot be used for accelerating the emulation of legacy x86 code in an ARM SoC the way you think. If it was possible, every single x86 CPU would have included an ARM core already. Basically, having 2 different core types require that almost every single resource in the system will need to be partitioned. Not ideal.... ARM SoC with even just a single Zen6c core for accelerating the emulation of legacy x86 code ...
Which AMD may have with Sound Wave APU.Again, LNL is a proof that all you need is a good SOC.