Question Zen 6 Speculation Thread

[Joe NYC]

Seeing the pace of AMD innovation, Zen 6 will have a new IOD + interconnect and that's mostly it. They do one thing at a time. So it took them like 9 years to create a "big APU", or they still keep using K10-like MCM...

With that in mind, AMD could, in theory, release new IOD with Zen 5, assuming the RDL connectivity will be compatible with Zen 6. It could still be AM5 socket, the IOD could be slightly beefed up with slightly bigger GPU and NPU, and the desktops could be Copilot compatible.

Then, when Zen 6 launches, for AM5, the IO Die would already be debugged, and launch could be more seamless.

The advantages of this aproach:
- 1 step at the time
- Copilot compatibility for corporate desktop
- lower power consumption of desktop CPUs

 

[SteinFG]

Copilot compatibility

Kraken already has that. Theoretical 9700G (or 350G, whatever it's gonna be called) is eligible for copilot. No need to make a weird SKU that only handful of AI lovers will buy

 

[SteinFG]

another 13% is series S that devs hate to deal with since Microsoft decided to save a few bucks on extra 2 GB vRAM, it's complete failure

This chip has 128-bit bus, and microsoft is already using clamshell setup to get 8+2 GB to that thing. I have no clue why they didn't refresh series S like a year ago with full clamshell setup (8+8=16GB of GDDR6), it would alleviate most struggles devs have, while also keeping the same SOC.

 

[Win2012R2]

I have no clue why they didn't refresh series S like a year ago with full clamshell setup (8+8=16GB of GDDR6), it would alleviate most struggles devs have

And what to do with the millions of V1 units that were sold, recall them? And PS5 digital was only marginally more expensive anyway

 

[StefanR5R]

Then, when Zen 6 launches, for AM5, the IO Die would already be debugged, and launch could be more seamless.

Remember 2024? There were no system-level changes from Raphael to Granite Ridge. Yet the mess at launch was thorough enough that they even retracted the launch date which their CEO had proclaimed earlier. And even after the delay, the usual hilarity with half baked AGESAs/BIOSes ensued.

 

[branch_suggestion]

https://twitter.com/x/status/1888057225509486991

So, Z6 classic moves the interconnect to the short side of the die it seems, god bless InFO.
And N2 for both classic and dense is a very good sign for N2.
N2 is basically just N3P but GAA, so it should clock really well along with everything else being better.
Since the costs and yields are good enough for such a move, some other AMD products in this time window could also move to N2.

 

[poke01]

Will Zen6 work with current AM5 boards?

 

[RnR_au]

Will Zen6 work with current AM5 boards?

I expect they would, but we have had no confirmation from AMD.

 

[Thunder 57]

Will Zen6 work with current AM5 boards?

No one knows yet. Based on their history I would think so but I have a feeling they will not. AMD went out of their way to keep things similar to AM4 to allow the same HSF's to be used on AM5. But who knows.

 

[Hail The Brain Slug]

No one knows yet. Based on their history I would think so but I have a feeling they will not. AMD went out of their way to keep things similar to AM4 to allow the same HSF's to be used on AM5. But who knows.

Unless they're making fundamental platform changes like moving to DDR6/LPDDR6, changing PCI-e lane count, etc, there's no reason for them to change sockets.

AM5 was necessitated by the shift from DDR4 to DDR5, pcie 4 to pcie 5, increasing lane count from 24 to 28, and the change to LGA for better pin signaling to help enable this.

 

[igor_kavinski]

Unless they're making fundamental platform changes like moving to DDR6/LPDDR6

If Nova Lake uses DDR6, AMD may also opt for that and since even AM4 CPUs are still selling, I don't think they would be bothered that much by the initial high prices of DDR6 CUDIMMs.

 

[jpiniero]

Since the costs and yields are good enough for such a move, some other AMD products in this time window could also move to N2.

I am def skeptical about the N2 part. Unless the CPU chiplet is like super tiny.

 

[Kepler_L2]

Will Zen6 work with current AM5 boards?

It will

 

[igor_kavinski]

It will

So there's a possibility that there will be a Zen 6 refresh with DDR6 support or is Zen 7 going to have that exclusively (in 2027?) ?

 

[Kepler_L2]

So there's a possibility that there will be a Zen 6 refresh with DDR6 support or is Zen 7 going to have that exclusively (in 2027?) ?

AMD will only touch (LP)DDR6 1-2 years after Intel. They still don't have the volume to move memory supply.

 

[jpiniero]

AMD will only touch (LP)DDR6 1-2 years after Intel. They still don't have the volume to move memory supply.

Presumably the first Intel socket that supports DDR6 will also support DDR5... which AMD doesn't like to do. And most of the volume would use DDR5.

 

[yuri69]

Expensive N2 makes sense for the dense 32 core CCX. N3 for the rest.

 

[HurleyBird]

If all the major client parts are using chiplets now, then it seems like a safe bet at least on those IODs (specifically Medusa Point, but maybe others too) will come with a (probably small, 2-6 core) LP Zen6c CCX.

 

[poke01]

I’m glad I went AMD. They seem to just make better CPU platforms.

Just pop in the the 10700X and good
to go.

 

[OneEng2]

https://twitter.com/x/status/1888057225509486991

So, Z6 classic moves the interconnect to the short side of the die it seems, god bless InFO.
And N2 for both classic and dense is a very good sign for N2.
N2 is basically just N3P but GAA, so it should clock really well along with everything else being better.
Since the costs and yields are good enough for such a move, some other AMD products in this time window could also move to N2.

I wouldn't say that exactly. N2 is a MUCH longer (and expensive) process with many more steps than N3P. GAA is a big part of that increased complexity.

I expect the desktop and laptop markets to remain on N3P. The die are small enough to keep yields high, and N3P is cheap compared to N2 ..... and also likely to yield higher as well as N3 tools and finfet libraries are much much more mature.

 

[Racan]

What are the chances that we'll get 12 core CCX parts with Zen 6 for client?

 

[igor_kavinski]

I say pretty great. I think 4 cores are insufficient in this day and age. My prediction about Zen 6 line-up:

Ryzen 3 6C/12T
Ryzen 5 8C/16T
Ryzen 7 10700X 10C/20T
Ryzen 7 10800X 12C/24T
Ryzen 9 10900X 20C/40T
Ryzen 9 10950X 24C/48T

 

[OneEng2]

I say pretty great. I think 4 cores are insufficient in this day and age. My prediction about Zen 6 line-up:

Ryzen 3 6C/12T
Ryzen 5 8C/16T
Ryzen 7 10700X 10C/20T
Ryzen 7 10800X 12C/24T
Ryzen 9 10900X 20C/40T
Ryzen 9 10950X 24C/48T

6 out of 12 cores defective seems like there wouldn't be enough of them to sell!

 

[Markfw]

6 out of 12 cores defective seems like there wouldn't be enough of them to sell!

They could just disable them.

 

[igor_kavinski]

And they could just use a separate smaller and cheaper 8 core CCD for the Ryzens 3 and 5.