Question Zen 6 Speculation Thread

[MadRat]

If you are doing ECC then you can run 28b and double pump the last 4b. As you increase width it adds delay for synchronizing arrivalf of thr data bits. Keep it narrow allows you to push shorter sync delays.

 

[soresu]

Intel wants to compete with low power ARM APUs. So it makes sense for them. Not sure if it makes sense for AMD

It's not about low power, except as a bi product.

Moar cores in Zen4c Bergamo is about hyperscalar customers that just want lots and lots of cores per socket for cloud purposes.

 

[soresu]

It's not really completely breaking new ground since Apple is already doing it

Technically Intel/AMD were doing it years back with Kaby Lake G/Vega M and its HBM on package memory.

 

[soresu]

If AMD didn't have such a bad CPU product at the time it would have been a more integrated package of entirely AMD design no doubt, rather than the chunky, rather awkward look KBL-G had.

 

[adroc_thurston]

If AMD didn't have such a bad CPU product at the time

It wasn't a CPU problem per se, just wasn't a product anyone gonna believe in till Apple has done it.
AMD tried to force the large APU issue into the laptop zeitgeist since Kaveri era, that's literally 10 years ago.

Only next year it does become real!

 

[MarkizSchnitzel]

Almost no one wants a tower case PC. Those have been the standard for years because of the need to fit 3.5" and 5.25" drives, but those are gone. So you can have a Mac Mini type form factor for the PC for the average person, and a Mac Studio like form factor (expanded to a cube) for those who want a discrete GPU. Tower style that aren't the server/workstation type platform PCs still using DIMMs are going to be a niche by the end of the decade if they exist at all.

At my company, and most others I know, low level IT or marketing, or municipality offices, or whatever, it's just price.
They will be buying towers and updating components as long as that is cheaper. They would not want to pay extra for extra performance or a more pleasing form factor, as we do work on rented VMs anyway.

 

[igor_kavinski]

Almost no one wants a tower case PC. Tower style that aren't the server/workstation type platform PCs still using DIMMs are going to be a niche by the end of the decade if they exist at all.

You sure need to visit third world country PC markets. That's mostly what they have there and they sell! Personally, I don't want any of the tower form factors going away unless the industry designs really convenient standard pluggable modules or all peripheral cards can be connected as external devices and daisy-chained using Oculink or USB4.

 

[soresu]

AMD tried to force the large APU issue into the laptop zeitgeist since Kaveri era, that's literally 10 years ago.

Large?

PS4 APU was large ish, albeit still decidedly midrange for a GPU of the time given it was basically gimped Pitcairn (IMHO Sony were trying to keep silicon costs down vs the PS3).

Kaveri wasn't even half that at 8 CU, and was announced over half a year later.

The CU count only increased from 8 -> 11 with Raven Ridge 3 years later, then went back again for Renoir until Rembrandt brought it up to 12, and now we are finally getting double and more Kaveri's CU count with Strix, but as you say over 10 yrs later.

If that is AMD trying to force the issue they desperately need some lessons from Sony and MS it seems 🤣😆

 

[Doug S]

You sure need to visit third world country PC markets. That's mostly what they have there and they sell! Personally, I don't want any of the tower form factors going away unless the industry designs really convenient standard pluggable modules or all peripheral cards can be connected as external devices and daisy-chained using Oculink or USB4.

Well its true I haven't poked around places selling PCs in the third world, but is there a particular reason they'll always want tower PCs? What's the gain for them to use a larger form factor, unless it is simply the economy of re-using the old case? (i.e. the PCs they're selling aren't "new", but a combination of new and secondhand parts and cases can be re-used for many years)

I mean if the market turns toward SFF style integrated boards nothing stops an OEM (or an individual) from putting that in an ATX tower case, so if that's what the market demands in a particular place for whatever reason it can be accommodated.

I agree there will always be a need for industrial or specialty systems where you don't need workstation/server level CPU power but have a need for multiple PCIe cards, so larger form factor boards will never go away. You'll be able to buy those, and cases to match, but have to look a little harder than you do today as I think it will be a niche market by the end of the decade. Very few people have a need/desire to plug in any card other than a GPU - and chiplets are going to allow for more powerful iGPU options so dGPUs are going to be become less common as well.

Connecting things externally and daisy chaining them or whatever is fine for temporary situations, but no one would prefer that for something that's going to be effectively permanently connected to their PC. So if boards drop SATA eventually for instance, and you have some old SATA drive you want to grab stuff off of once in a while then you can connect that via TB or USB with an adapter, but if you needed to access that drive all the time you'd want a board with a SATA port and a case with a place to mount that drive (which doesn't have to be a tower, I have a SFF case sitting next to me with two SSDs and two laptop HDDs internally mounted)

 

[adroc_thurston]

Large?

Yeah, large.

Kaveri wasn't even half that at 8 CU, and was announced over half a year later.

Yeah and it was bandwidth-bound due to no GDDR5M.

If that is AMD trying to force the issue they desperately need some lessons from Sony and MS it seems

Big APU is a different swimlane, not mainstream 128b devices.

 

[MadRat]

I prefer an ATX sized case because of full height card support.

I once had a Compaq thin client that used sideways PCI via an expansion card. That was handy at the time, using a KVM switch between it and my full-sized desktop. Most people didn't even recognize the thin client on the desk. Could switch near instantly between screens and it was relatively fast in its day. But its compact (pun intended) design left much to be desired when opening the case for swapping parts.

 

[Doug S]

I prefer an ATX sized case because of full height card support.

I once had a Compaq thin client that used sideways PCI via an expansion card. That was handy at the time, using a KVM switch between it and my full-sized desktop. Most people didn't even recognize the thin client on the desk. Could switch near instantly between screens and it was relatively fast in its day. But its compact (pun intended) design left much to be desired when opening the case for swapping parts.

That's easy to support off a SFF board though, you don't need a tower. Rather than a Mac Mini case you'd get something like a taller Mac Studio case (more of a cube form factor) That's actually what my mini-ITX case is (about 10"x10x10) but not because I have a card but because I needed something that had a place to stick four laptop hard drives (which is a long story I won't bore you with)

I agree swapping parts in a SFF case is a pain, which is mostly due to cables and wires going all over the place. Fortunately the amount of wiring keeps decreasing, as now SATA is on the way out. So other than a couple of fan headers the only wiring will be the two things I would fix I was king. The space wasting and well past its sell by date ATX power standard, and header pins that should have been replaced with a better technology in the 90s.

 

[cytg111]

As the previous thread turned from 40 to 10, are these threads not pointless?

 

[Fjodor2001]

Assuming there will be Zen6 DT variants with more than 16 cores, what do you think would be mostly likely? :

2x16C Zen6, and 1x16C + 1x8C Zen6
or
1x8C Zen6 + 1x32C Zen6C

I.e. only big cores, or mix of big + compact cores? Any restrictions on e.g. power consumption or memory bandwidth, that makes one alternative more likely?

 

[Markfw]

Assuming there will be Zen6 DT variants with more than 16 cores, what do you think would be mostly likely? :

2x16C Zen6, and 1x16C + 1x8C Zen6
or
1x8C Zen6 + 1x32C Zen6C

I.e. only big cores, or mix of big + compact cores? Any restrictions on e.g. power consumption or memory bandwidth, that makes one alternative more likely?

Unless Intel does something that threatens AMDs multicore current lead, I can't see AMD with going with more than 16, even in Zen 6. (in desktop)

 

[Fjodor2001]

Unless Intel does something that threatens AMDs multicore current lead, I can't see AMD with going with more than 16, even in Zen 6. (in desktop)

So AMD has to be chased by others to advance nowadays. How boring. Was like when Intel was stuck on 4C more or less forever, until AMD Zen 8C arrived and quickly after that 16C.

But from a purely technical aspect, which of the alternatives that I mentioned would be more likely?

 

[StefanR5R]

Neither corporate desktop platforms nor DIY desktop platforms will migrate to workstation/ server platforms.

It's not about competitor threats. It's about the applications which are being run in these segments, and corresponding cost–benefit ratios.

 

[Joe NYC]

So AMD has to be chased by others to advance nowadays. How boring. Was like when Intel was stuck on 4C more or less forever, until AMD Zen 8C arrived and quickly after that 16C.

But from a purely technical aspect, which of the alternatives that I mentioned would be more likely?

More cores are boring.

What is NOT boring?
- V-Cache
- bigger V-Cache
- V-Cache running at full speed, no clock regression
- 16 core CCD with double L3, double V-Cache.

 

[DisEnchantment]

What is NOT boring?
- V-Cache
- bigger V-Cache
- V-Cache running at full speed, no clock regression
- 16 core CCD with double L3, double V-Cache.

Lower power envelopes (< 12W )
Chiplet SoCs
Fat SLC
Low power interconnect for chiplets
GPU coherent with CPU at IO Tile like MI300
Wider fabric and and higher clock
LPDDR6 memory

 

[Fjodor2001]

What is NOT boring?
- V-Cache
- bigger V-Cache
- V-Cache running at full speed, no clock regression
- 16 core CCD with double L3, double V-Cache.

V-Cache will be the new AI. It’s all we’ll hear about. 🤣

 

[cytg111]

So AMD has to be chased by others to advance nowadays. How boring. Was like when Intel was stuck on 4C more or less forever, until AMD Zen 8C arrived and quickly after that 16C.

But from a purely technical aspect, which of the alternatives that I mentioned would be more likely?

Its a never ending cycle of competition. And there is only two players in the field. Three. Three players in the field.
And they all compete for the same TSMC. We need Intel to step the fab game tf up. Now.

 

[Joe NYC]

Some of the items you outline are likely already coming, if Zen 6 client is based on Strict Halo

Lower power envelopes (< 12W )

The desktop IO chiplet was just scaled down server chiplet. I wonder where idle power overhead is coming from mostly. The SerDes is going away, for one thing.

AMD has made incremental improvements to un-core with Rembrandt, Pheonix, Strix. Very little to none of that has made it to the desktop IOD.

Chiplet SoCs

Well, Strix Halo has it, but it is on N3E (apparently). So not ideal from cost perspective. I am curious how the Zen 6 client organizes the chiplets.

For example, Strix Halo pairs fat GPU with memory controllers and SLC on the same die. Which may be a good choice for power, since data does not have to cross chiplet boundaries, but memory controllers, SLC, IO being on the most expensive node (N3E) while they could as well be on the cheapest node (N6) is not idea.

Fat SLC

Similar to the above. For SLC to be fat, ideally, it should be on N6 node, to make it really fat.
And SLC had to be cut to room for NPU.

AMD is bringing SLC to Strict Halo, and ideally, to mainstream laptops.

Stacking could be the solution, as 2 separate possibilities:
- N6 "V-Cache" stacked on top of SOC
- N6 as a base die, with all of the IO, memory controllers, SLC. iGPU would be top die on advanced process node. (desktop implementation, would just not be a top die)

Low power interconnect for chiplets

Some sort of fan out RDL seems to be the choice for client, from RDNA3 to Strix Halo and possibly to Zen 6 client. Likely low enough power. I wonder how it compares to Intel Foveros.

GPU coherent with CPU at IO Tile like MI300

I think this might need some adjustment to Direct X to take advantage of this. I wonder if on the hardware level, it is already implemented. Memory is already being shared, CPU and GPU are grabbing from the same pool. But avoiding needless copying from CPU owned to GPU owned areas is probably an OS and software problem.

Wider fabric and and higher clock

Strix Halo may already be implementing this, between the chiplets.

LPDDR6 memory

 

[Joe NYC]

V-Cache will be the new AI. It’s all we’ll hear about. 🤣

You need to be able to tell apart grass (root) from Astroturf.

 

[FlameTail]

Not sure why the hate for multithreading.

For small cores it gets forward movement when one context is stalled for Free*. Nice for real-time, too.

For large cores it gets you high utilization of functional units for Free*.

* Terms and conditions apply, but the costs are pretty small. Marvell called it a 5% area impact for TX3.

SMT can be replaced with a monster OoOE, which can give the same core utilisation benefits, but for a ST.

 

[FlameTail]

Strix Halo will be old news by the time LPDDR6 will be out in volume. It's a Zen5 product, while even Zen6 is probably too early for LP6.

Hmm. LPDDR6 will certainly be in market by the time Zen6 rolls out. The question is whether Zen6 will support LPDDR6.