Whoa, a Zen Interview with Mike Clark by Casey Muratori (who is a really badass well informed developer btw )
An Interview with Zen Chief Architect Mike Clark
Zen is one of the most important microarchitectures in the history of the x86 ecosystem.www.computerenhance.com
Lot's of nice detail. Among other things:
AMD's own Phil Park also recommends it:
This can limit the performance of x86 vs Apple silicon and there won't be a real solution for a long time. The fact x86 needs to run Windows and Linux and both is still 4k pages default means it will be limited by design. This is just 1 major issue that can fixed if theres no need to support legacy. Apple has moved past 4k pages because they can control the software side as well as hardware, might be where some of their performance/efficiency gains are coming from.CASEY: Similar question, but moving to the OS side of things: does the 4k page size on x64 create problems for you architecturally by limiting the L1 cache size due to how tagging works? Would architectures like Zen benefit if x64 operating systems moved to 2mb pages as the smallest page size, or perhaps a 16k or 64k page size if you were to introduce that in a future architecture?
MIKE: Definitely. We always encourage developers to use larger page sizes if they can, because it gives us a lot more capacity in our TLBs and therefore less TLB pressure overall. But we have the ability to combine 4k pages into larger pages in our TLB if the OS allocates them sequentially. We can turn four 4k pages into a 16k page if they are virtually and physically sequential. That's been a technique we've used even since the original Zen to help software get the benefits of larger page sizes without moving away from 4k pages.
Don't you like marketing? It looks like AMD learned a few tricks from Intel.oh...... what a terrible misleading graph 😂
It's a really basic graph to read. I'm really not sure what the problem is? What would you prefer exactly?Don't you like marketing? It looks like AMD learned a few tricks from Intel.
That s rather 6.55% MT uplift at 45W, this amount to a N4 to N4P shrink.oh...... what a terrible misleading graph 😂
still graph implies +14% MT perf 45w vs 45w (gorgon vs strix)
The mobile stuff is CES 2027That s rather 6.55% MT uplift at 45W, this amount to a N4 to N4P shrink.
Anyway if this is for 2026 it means that Zen 6 APUs will be released in Q4 2026
at the earliest.
Is there any info whether Desktop is planned sooner or later than that?The mobile stuff is CES 2027
Desktop Q4 26Is there any info whether Desktop is planned sooner or later than that?
How has the 5nm node held back Zen 5 performance?
Good info/speculation. Thank you for your insight.I think that was more in reference to the IO die. I don't know if that's necessarily the node (6nm) so much as design choices by AMD to keep the power use down, particularly at idle.
More specifically it was about the IO die not being able to leverage faster RAM speeds leading to the cores being bandwidth starved for anything that could use all 16 of them on the top-end models.
It also meant slightly worse latency, but there's X3D models can eliminate that to some degree unless it's essentially random memory accesses.
Personally I think AMD should design the IO to prioritize performance more. Laptops are using APUs that can be designed to prioritize power and server chips want to be always in use, so idle state is rarely reached. Most desktop users don't care and AMD could design a low power mode where at idle the memory controller operates at a smaller fraction of actual memory speed, something like a hypothetical gear 4 or even gear 8 in an Intel CPU. Even if they don't and the IO die is drawing more power and dissipating more heat I don't think it breaks the bank on power limits or presents any hotspot issues as far as cooling is concerned.
Thanks Gideon.Whoa, a Zen Interview with Mike Clark by Casey Muratori (who is a really badass well informed developer btw )
An Interview with Zen Chief Architect Mike Clark
Zen is one of the most important microarchitectures in the history of the x86 ecosystem.www.computerenhance.com
Lot's of nice detail. Among other things:
AMD's own Phil Park also recommends it:
I don't think the refresh is Zen 6. It is a Zen 5 Strix Point refresh AFAIK. Likely just a stepping that improved yields and clock speeds a bit with perhaps a tiny improvement in the memory controller interface giving MT a little more air to breath.That s rather 6.55% MT uplift at 45W, this amount to a N4 to N4P shrink.
Anyway if this is for 2026 it means that Zen 6 APUs will be released in Q4 2026
at the earliest.
well yeah it says it right there.I don't think the refresh is Zen 6.
I didnt imply that it was Zen 6, beside 6% MT improvement imply 6% higher perf for all cores, dunno from where you did extract your quirky maths.I don't think the refresh is Zen 6. It is a Zen 5 Strix Point refresh AFAIK. Likely just a stepping that improved yields and clock speeds a bit with perhaps a tiny improvement in the memory controller interface giving MT a little more air to breath.
if 12 cores gets you just a 6% increase, then each core is only improving by 1/2%. Easily achievable with a little tweak or a little bump in clock speed.
well yeah it says it right there.
Zen5 n stuff.
N2 volume probably. Zen2 had a similar schedule when it got moved from N10 to N7.Because, I wonder, what would cause the cadence to slow down from Zen 5 -> Zen 6, if Zen 6 is an incremental upgrade (unlike Zen 5), and AMD already is well on the way (from the work put into Strix Halo) with the new IO dies.
Client Z6 is H2'26.Hopefully, 2026 will follow 2024 pattern, and we get some of the Zen 6 being released by mid-year 2026 (as MLID seems to think is the case while Kepler disagrees).
N2 volume probably. Zen2 had a similar schedule when it got moved from N10 to N7.
nope.which would limit the volumes to other customers.
no.The conventional wisdom was no volume N2 iPhones in 2026, but N2 is apparently so healthy that Apple is tempted
it doesn't.Apple's decision may impact Zen 6. schedule.
no it's purely a cost thing.If Apple's use of N2 is limited to low volume products, then there will be plentiful capacity for AMD to release Zen 6 at ~ mid year 2026.
Is it just a rumor or known thing (that Zen2 was targeting 10FF )?N2 volume probably. Zen2 had a similar schedule when it got moved from N10 to N7.
Was mentioned in a interview with either Mark Papermaster or Forest Norrod a long time ago.Is it just a rumor or known thing (that Zen2 was targeting 10FF )?
N2 is on schedule, no hick ups. Risk production in H2 2025, volume production starting in 2026. There were some rumors / leaks that AMD is participating in the N2 risk production (Zen 6 and Mi400).
One thing that is unknown (to the public) is if Apple decided to go with N2 for their mainstream 2026 iPhone models, which would limit the volumes to other customers.
The conventional wisdom was no volume N2 iPhones in 2026, but N2 is apparently so healthy that Apple is tempted. The decision was almost certainly made already, we just don't know what it is. Apple's decision may impact Zen 6. schedule.
If Apple's use of N2 is limited to low volume products, then there will be plentiful capacity for AMD to release Zen 6 at ~ mid year 2026.
N2X, oh yeah. Single core uplift be crazyNew MLID video. Mentions Zen6 in title. I haven't watched it yet.
One slide he showed had >6GHz mentioned for Medusa Range. 9955HX has 5.4 GHz boost, so that's a minimum 12% 1T clock speed bump.N2X, oh yeah. Single core uplift be crazy