Question Zen 6 Speculation Thread

[naukkis]

AMD's ISSCC presentation on Zen5.

Please share that - I can't find such a statement.

 

[blackangus]

I never see it mentioned by others and I think it's a major key point:

computing requirements are plateauing.

Never underestimate how greedy applications can be.

 

[Thibsie]

Never underestimate how greedy applications can be.

Yeah, just compare Win10 first build and last build. Huh. 😳

 

[StefanR5R]

@naukkis, I am too cheap to look up the original slide set. But here is some 2nd hand info:

The "Zen 3" and "Zen 4" L3 "ring" fabric topology [5] is replaced by a mesh topology which reduces latency and increases bandwidth, especially for configurations with higher core counts.

(TechTechPotato video at 00:56:52)
The subsets of slides which some 3rd parties published do not detail the exact topology of the Zen 5c server CCX.

So, AMD speak explicitly of a mesh. On the other hand, they kept speaking of a ring WRT Zen 3 and 4's CCX, while it is actually a ring with undisclosed extras.
(Dr. Ian Cutress: Does an AMD Chiplet Have a Core Count Limit?)

 

[Hulk]

I don't think N2X is, uh, "lower power".

Uh, yes. It is.

Power reduction = Lower power

 

[Thibsie]

Uh, yes. It is.

Power reduction = Lower power

View attachment 122402

He probably meant N2X compared to vanilla N2 ??

 

[Kronos1996]

I think AMD will Keep It Simple with Zen 6. 24 cores and ~10% IPC increase, maybe a few hundred MHz frequency increase under load due to lower power with the new node. Put it all together and you've got a solid bump from Zen 5.

Agreed, IPC won’t be the focus but I still expect above average single-core gains. Zen 4 was a very similar situation. Built on Zen 3’s new core and ramped everything up to 11. The final result was 25% higher single-core performance and only half of that was IPC (13%.) Huge clock-speed bumps and of course faster ram (DDR5.)

Zen 5 is also a new core, probably the most radical redesign they’ve done. Mike Clark said he’s very pleased with how it turned out but especially how much room it has for future growth. Zen 6 will build on that while adding new packaging and a new IOD for faster memory while jumping two nodes. Given all that, anything less than 20-25% single-core improvement would be a disappointment.

 

[Kronos1996]

Ahh.

I am still betting that the Zen 6 DC dense version (whatever they call it) will have several 32c Zen 6c CCD's ... made on N2 of course.

I am still not convinced that AMD will use N2 for desktop and laptop though. We will see.

Why wouldn’t they? Silicon cost isn’t an issue for a ~70mm2 die and 2nm shouldn’t cost much more than N3P while offering bigger performance improvements. IIRC it may offer better yields longterm as well. N3 pushes FinFet to the absolute limit. Which is why it had issues and offers below-average improvement for a new node.

With Intel Foundries back on track and 18A looking to match or exceed 2nm, AMD should be more aggressive with nodes. Surely Intel Products will figure out how to design a competent core eventually? Banking on that handicap long-term would be unwise.

Also, Mike Clark said designing Zen 5/5C for two nodes in parallel was a nightmare. Strongly doubt they wanna repeat that experience. For what benefit? An N3P CCD that’s $10 cheaper?

(Latest TechTechPotato livestream they estimated an N2 CCD costs $45-54 at a wafer cost of $25K-30K. That’s a worst case scenario using early yields and worse pricing than AMD probably pays. N3 wafers are rumored to cost $18K-20K so the same size die would be $33-36. However, that ignores the fact that the N3 die would have to be bigger due to worse transistor density.)

 

[jpiniero]

Why wouldn’t they? Silicon cost isn’t an issue for a ~70mm2 die and 2nm shouldn’t cost much more than N3P

Oh but it will. If you have customers willing to pay for the power savings, great. Client is not one of those.

 

[Hulk]

With Intel Foundries back on track and 18A looking to match or exceed 2nm, AMD should be more aggressive with nodes. Surely Intel Products will figure out how to design a competent core eventually? Banking on that handicap long-term would be unwise.

I really hope 18A is going to put Intel back on the map from a fab point-of-view. It's been so long since they've had a fab win. Needless to say, they need it.

 

[fastandfurious6]

Uh, yes. It is.

Power reduction = Lower power

View attachment 122402

my guess N2X gonna be ~20% more speed at same power

adjustable on runtime between perf/power or its fab design choices?


combine IPC increase with big node jump and bigger CCDs and you have Zen 60%

 

[Gideon]

my guess N2X gonna be ~20% more speed at same power

adjustable on runtime between perf/power or its fab design choices?


combine IPC increase with big node jump and bigger CCDs and you have Zen 60%

Stop with the delusional takes, it gets tiresome. Zen6 might very well be the better product (I hope so) but there is absolutely no evidence suggesting N2X will have 20% better performance (not density) than 18A.

It might be in the ballpark but suggesting it's flat out better by 20% is ignorant fanboyism. Will we se you publicly eat crow, when this instead turns out to be accurate?

https://twitter.com/x/status/1913823095837573191

More likely you'll just shift some goalposts

 

[Hulk]

Stop with the delusional takes, it gets tiresome. Zen6 might very well be the better product (I hope so) but there is absolutely no evidence suggesting N2X will have 20% better performance (not density) than 18A.

It might be in the ballpark but suggesting it's flat out better by 20% is ignorant fanboyism. Will we se you publicly eat crow, when this instead turns out to be accurate?

https://twitter.com/x/status/1913823095837573191

More likely you'll just shift some goalposts

I think that was in comparison to N3E not 18A perhaps?

 

[fastandfurious6]

Stop with the delusional takes

delusional?? me? but I'm the prophet!

yes the comparison is to N3E (as the graph shows) and numbers will be much higher over Zen 5 (N4P)

that being said, my prediction is Intel A18 ~= TSMC N3, so it might also be comparison to A18 lol!

 

[adroc_thurston]

Uh, yes. It is.

You do understand what the X is for don't you

 

[OneEng2]

I think AMD will Keep It Simple with Zen 6. 24 cores and ~10% IPC increase, maybe a few hundred MHz frequency increase under load due to lower power with the new node. Put it all together and you've got a solid bump from Zen 5.

As optimistic as I would like to be on this one, I think you are likely correct. This is doubly true if I am right about AMD sticking to N3P for desktop Zen 6.

I don't think N2X is, uh, "lower power".

Anything N2 is going to be significantly lower power than the current N4P Zen 5. Not sure where you are coming from here.

Why wouldn’t they? Silicon cost isn’t an issue for a ~70mm2 die and 2nm shouldn’t cost much more than N3P while offering bigger performance improvements. IIRC it may offer better yields longterm as well. N3 pushes FinFet to the absolute limit. Which is why it had issues and offers below-average improvement for a new node.

With Intel Foundries back on track and 18A looking to match or exceed 2nm, AMD should be more aggressive with nodes. Surely Intel Products will figure out how to design a competent core eventually? Banking on that handicap long-term would be unwise.

Also, Mike Clark said designing Zen 5/5C for two nodes in parallel was a nightmare. Strongly doubt they wanna repeat that experience. For what benefit? An N3P CCD that’s $10 cheaper?

(Latest TechTechPotato livestream they estimated an N2 CCD costs $45-54 at a wafer cost of $25K-30K. That’s a worst case scenario using early yields and worse pricing than AMD probably pays. N3 wafers are rumored to cost $18K-20K so the same size die would be $33-36. However, that ignores the fact that the N3 die would have to be bigger due to worse transistor density.)

I don't think it is about absolute performance anymore. If AMD wants absolute performance, it will be filled by Threadripper, not with their standard desktop offerings (or laptop offerings). From a strategic point of view, AMD is beating the crap out of Intel by making competitive products that are much less expensive for them to make.

In engineering, it isn't all that difficult to create a superior product if the price of that product is not a consideration. We did put a man on the moon in the 60's after all.

I think Intel's Total Cost of Ownership for 18A is going to be beyond prohibitive. I believe it will be very performant, but not cost effective. Intel is bleeding money badly. They need to start thinking much more like AMD and think about the COST of architectural decisions, not JUST the performance.

Think about the REAL reasons AMD is ahead.

1. Higher yields and lower cost per die through chiplets (and the architectural enhancements in the core and interfacing that keeps the performance high despite the higher connection latencies).
2. HPC dominance through the Threadripper product offering
3. DC dominance through Turin and Turin D by use of a very effective IOD and multi-channel memory feeds.

It isn't at all just the transistor technology anymore. Intel desperately needs to understand this IMO.

 

[adroc_thurston]

Anything N2 is going to be significantly lower power than the current N4P Zen 5. Not sure where you are coming from here.

No it wouldn't lol, it's all speed gainz all the way thru.
Everyone and their mom are juicing their designs.
Speed is king.

 

[Philste]

Saying Arrow Lake is on top of Zen 5 is quite a stretch, especially when you consider it has a full node advantage and 50% more cores,

Calling N3B vs N4P/N4X (or whatever AMD really uses) is also quite a stretch. It's maybe a low single digit advantage for N3B at best, and with DTCO AMD might even have the better process. You could also argue that AMD has 33% more threads and so on.

I would say ARL and ZEN5 are pretty much on par as a whole, if we exclude X3D I would say ARL is ahead, if we just look at X3D, X3D is ahead. Overall its quite remarkable how close these CPUs are in most things, while being a completely different approach to most things.

 

[adroc_thurston]

It's maybe a low single digit advantage for N3B at best, and with DTCO AMD might even have the better process.

lmao no N3b is far far better when you're doing anything power-constrained.

 

[naukkis]

@naukkis, I am too cheap to look up the original slide set. But here is some 2nd hand info:

(TechTechPotato video at 00:56:52)
The subsets of slides which some 3rd parties published do not detail the exact topology of the Zen 5c server CCX.

So, AMD speak explicitly of a mesh. On the other hand, they kept speaking of a ring WRT Zen 3 and 4's CCX, while it is actually a ring with undisclosed extras.
(Dr. Ian Cutress: Does an AMD Chiplet Have a Core Count Limit?)

AMD does not describe Zen5 L3 fabric as a mesh anywhere in their slides. What they say that they keep same layout as Zen3/4 but improved latency. And technical details come from whistleblowers months before Zen5 release that they added ladders to their ring fabric - and did it by core pairing - actual fabric is 100% same as before but thanks to core pairing core can send data always on destination side removing need for packed traveling to other side of ring through it's ends, basically halving effective ring length which is pretty much in line what AMD states as their L3 latency improvement 3.5 cycles at 8 cpu ring.

We have die shot. Do research yourself and see how ring-based cpu dies always grow up in one dimension when adding ring stops and good luck finding any mesh-based die growing similarly only on one dimension. And then look that Ze5c die......

Discussing AMD’s Zen 5 at Hot Chips 2024

Hot Chips isn’t just a conference where companies give in-depth presentations on the architectures behind high performance chips.

chipsandcheese.com

 

[MS_AT]

AMD does not describe Zen5 L3 fabric as a mesh anywhere in their slides.

It does. It's in the article they show at the provided timestamp. First paragraph in the second (right) column.

 

[adroc_thurston]

AMD does not describe Zen5 L3 fabric as a mesh anywhere in their slides

yeah they do.
please stop, this is getting embarassing.

 

[eek2121]

I think AMD will Keep It Simple with Zen 6. 24 cores and ~10% IPC increase, maybe a few hundred MHz frequency increase under load due to lower power with the new node. Put it all together and you've got a solid bump from Zen 5.

I suspect Zen 6 desktop will clock in at 5.7ghz. No inside info, just call it a "well educated guess" based upon other metrics that HAVE been leaked. Wider cores don't come free, and desktop is never the most efficient use of silicon. Nor are laptop chips. Both Intel and AMD play a very different game from Apple/ARM/whatever. They optimized for performance and cost primarily, which sacrifice power for both metrics. This excludes EPYC, which I won't touch tonight.

AMD's ISSCC presentation on Zen5.

this is qanon for tech nerds.
blergh.

Disclaimer, I had a few glasses of wine before I could even touch this conversation, and even now just a suggestion, you all need to chill! 🤣 You are actually both right from my understanding.

Why wouldn’t they? Silicon cost isn’t an issue for a ~70mm2 die and 2nm shouldn’t cost much more than N3P while offering bigger performance improvements. IIRC it may offer better yields longterm as well. N3 pushes FinFet to the absolute limit. Which is why it had issues and offers below-average improvement for a new node.

This is not really a great take. You are making a lot of assumptions. One not so great one: N3 has absolutely nothing wrong with it. Yields are better than ever, performance characteristics are better than ever, power consumption is great, die area is great. They are LEADING in this area. Nothing else can touch it until other folks get up to speed.

The libraries used determine the benefits/drawbacks. TSMC also doesn't help much because they constantly rebrand things. They also tend to be rather opaque about performance characteristics. N3, especially N3E, is great. Expensive, but great. 🥂

 

[OneEng2]

No it wouldn't lol, it's all speed gainz all the way thru.
Everyone and their mom are juicing their designs.
Speed is king.

No, this is not true in DC and laptop at all. It is true for desktop, and then really only for ST performance (and even then only for non-latency limited apps) as even high core count desktop is becoming power and thermal limited if not socket power limited. It is true that Intel has pursued a course like you suggest. I would say this is part of the reason why they are in such a bad state. Ironic since I thought they learned their lesson with P4 and Netburst, but alas.

As the next gen doubles (or more) the core count, power will become even more important. Also, die space and cost are absolutely critical (as Intel is finding out). Creating a chip you can't make money on is a fools errand.

To say only transistor speed is important is very wrong. To borrow a phrase from Star Wars:

"You will find that it is you who are mistaken, about a great many things."​

Calling N3B vs N4P/N4X (or whatever AMD really uses) is also quite a stretch. It's maybe a low single digit advantage for N3B at best, and with DTCO AMD might even have the better process. You could also argue that AMD has 33% more threads and so on.

I would say ARL and ZEN5 are pretty much on par as a whole, if we exclude X3D I would say ARL is ahead, if we just look at X3D, X3D is ahead. Overall its quite remarkable how close these CPUs are in most things, while being a completely different approach to most things.

Wow. Lots wrong here as well. Lets break it down one wrong thing at a time:

"It's maybe a low single digit advantage for N3B at best"

Well lets see. Lets pick a metric eh? How about transistor density?

First lets start with this chart here: https://www.anandtech.com/show/21408/tsmc-roadmap-at-a-glance-n3x-n2p-a16-2025-2026

N4P is ~6% more dense than N5. So lets figure this out...
N5:N4P = 1.06 (6%)
N5:N3E=1.3(30%)
N3B:N3E=1.08 (8%)

So N4P:N3B = 30%+8%-6%=32% more dense (1.32)

That is a HUGE increase in transistor budget for Arrow Lake vs Zen 5.

The reality is that it is likely not that simple of math and that it ends up being a combination of power improvements, speed improvements and density improvements as well as layout improvements that are not taken into account as the tools get better over time.

The bottom line is Arrow Lake struggles to match Zen 5 with substantial process advantages on a much more expensive node.

Next up, lets take this one on: "I would say ARL and ZEN5 are pretty much on par as a whole"

Yea, not so much:

https://phoronix.com/benchmark/result/intel-core-ultra-amd-ryzen-9000-linux-2025/geometric-mean-of-all-test-results-result-composite-icuar9-linux-2025.svgz

 

[adroc_thurston]

No, this is not true in DC and laptop at all.

Quite literally true for everyone and everything.
Go zoom is the meta.