Zen APUs made by GloFo, 14nm FinFET node, and packaged by Amkor

[ShintaiDK]

??

Again you are trying to extrapolate from a best case demo that runs at ~0.2W at ~0.24mm2 to a ~0.3W at 0.06mm2 to any design at any speed and power. Protip, it doesn't work that way!

If it was so, Skylake would be DOA and we all would be buying 5Ghz 50W Haswells. And AMD would just use existing GCNs to pump out a 2-2½Ghz GPU using a fraction of the power. And the 14lpp SD820/Exynos 8890 wouldn't need a vapour pipe either.

Does this look familiar?

How was reality again?

 

[raghu78]

From the tables above.

14nm LPP gives you both an increase in Fmax and a reduction of leakage.

Increasing the Fmax to 5GHz on 14nm LPP vs 4GHz on 32nm SOI (Vishera) would decrease the power by a large margin of 50-60%.

Static power (Idle state) would also decrease substantially.

It does not work that way. The type of transistors required o hit 4 Ghz differ from those which are designed to run at 2-2.5 Ghz. Even Intel had significant power reduction at 2-3 Ghz clocks when comparing their 22nm to 14nm. But at 4 Ghz clocks the power reduction benefits reduced significantly. I doubt GF 14 LPP can even get to even 4.5 Ghz leave alone 5 Ghz. Intel 14nm is a much better high performance process node than GF 14LPP and even they could not hit 5 Ghz on 14nm.

 

[AtenRa]

Again you are trying to extrapolate from a best case demo that runs at ~0.2W at ~0.24mm2 to a ~0.3W at 0.06mm2 to any design at any speed and power. Protip, it doesn't work that way!

If it was so, Skylake would be DOA and we all would be buying 5Ghz 50W Haswells. And AMD would just use existing GCNs to pump out a 2-2½Ghz GPU using a fraction of the power. And the 14lpp SD820/Exynos 8890 wouldn't need a vapour pipe either.

Im talking porting the same CPU from 28nm PLANAR to 14nm LPP (FIN FET).

Just take a look what NVIDIA managed when they ported GTX280 from 65nm to half node 55nm (GTX 285). Same GPU design.

GTX 280 65nm
Clocks = 602MHz
TDP = 236W TDP

GTX 285 55nm
Clocks = 648MHz
TDP = 204W TDP

Again, you can port the same Kaveri design to 14nm LPP and have an increase in Fmax and a decrease in TDP at the same time.

Obviously you cannot have 2.5x increase in Fmax and a Decrease in power at the same time.

 

[ShintaiDK]

Intel 14nm is a much better high performance process node than GF 14LPP and even they could not hit 5 Ghz on 14nm.

Not true, you can get 5.1Ghz at 165W as a special OEM SKU with the Xeon E5-2602

But that's pretty much 2x power to get 25% high clocks.

 

[ShintaiDK]

Im talking porting the same CPU from 28nm PLANAR to 14nm LPP (FIN FET).

Just take a look what NVIDIA managed when they ported GTX280 from 65nm to half node 55nm (GTX 285). Same GPU design.

GTX 280 65nm
Clocks = 602MHz
TDP = 236W TDP

GTX 285 55nm
Clocks = 648MHz
TDP = 204W TDP

Again, you can port the same Kaveri design to 14nm LPP and have an increase in Fmax and a decrease in TDP at the same time.

Obviously you cannot have 2.5x increase in Fmax and a Decrease in power at the same time.

Again, you are trying to extrapolate a best case ultra tiny study to any design, frequency and power level. It does not work that way. Just like when you and others try to extrapolate from ISO numbers.

These libraries you stumbled over was also there for 28nm and 40nm. And I am sure even higher nodes as well.

 

[itsmydamnation]

Why on Earth would AMD bother to die shrink such an awful architecture?

There are very good reasons why Zen has so little in common with Bulldozer and its derivatives.

there is likely lots of bulldozer legacy in Zen, PRF, load store pipeline, decode, prefetch, predict. Why would you toss away things that aren't broken?

Even Excavator, the newest iteration, is slower than Thuban, clock for clock. In other words, it has lower IPC than Thuban, which is now positively ancient.

thats just not true, in situations where ILP is cheap and easy sure, thats because its a wider design. But its also a design that is far more limited in its OOOE capabilities.

in things like superPI 32m for example excavator is about 40% fast per clock then thuban. In things like Cinebench R11.5 which is all SSE the 3 FP units a core vs the two fp units per module only just beat excavator.

 

[AtenRa]

It does not work that way. The type of transistors required o hit 4 Ghz differ from those which are designed to run at 2-2.5 Ghz. Even Intel had significant power reduction at 2-3 Ghz clocks when comparing their 22nm to 14nm. But at 4 Ghz clocks the power reduction benefits reduced significantly. I doubt GF 14 LPP can even get to even 4.5 Ghz leave alone 5 Ghz. Intel 14nm is a much better high performance process node than GF 14LPP and even they could not hit 5 Ghz on 14nm.

You are forgetting we are porting the same CPU design to 14nm LPP. If Kaveri can operate at 4GHz at 95W TDP on the 28nm Planar, it can certainly be clocked at 5GHz at lower TDP if manufactured at 14nm LPP.

Example,

At 14nm LPP you can have a 4GHz Kaveri at 35-45W TDP

OR

A 5GHz Kaveri at 65W TDP

OR

A 5.5GHz Kaveri at 95W TDP

 

[cytg111]

I'm still wondering about the bandwidth between a dGPU box and the main console. Which connection would it use?

Would there be one? Sounds to me like

"will include an upgraded GPU both to support high-end 4K resolution for games and add more processing power that can enhance the games "

it is a new/beefed up soc on both the CPU and GPU side of things. So onion/garlic - as usual or whatever it is named?

I think the 4.5 naming scheme makes sense, there is no need to burn your self on yet another 3D failure.
Of course, VR wont fail.

 

[AtenRa]

Does this look familiar?

How was reality again?

The above table is about Speed vs Area.

We are talking speed vs power here.

 

[ShintaiDK]

The above table is about Speed vs Area.

We are talking speed vs power here.

You are talking about all 3 cases with your 70mm2 Kaveri at 5Ghz using 55W.

 

[AtenRa]

You are talking about all 3 cases with your 70mm2 Kaveri at 5Ghz using 55W.

You have the same density at 4GHz or 5GHz, id doesnt change.

What changes is the Fmax to power ratio.

 

[ShintaiDK]

You have the same density at 4GHz or 5GHz, id doesnt change.

What changes is the Fmax to power ratio.

You are way deep into the hyperbole you created.

Kaveri at 14nm LPP (using high-speed VLT)

Die size = ~70mm2
CPU max Clock = 5GHz ??
iGPU clock = 1100MHz ??
TDP = 35W ??

Forget it, not going to happen.

 

[cytg111]

You are way deep into the hyperbole you created.

I am pretty sure it was you who created it for him. Almost, like, on purpose.

 

[AtenRa]

35W TDP Mobile Kaveri (A10-7600P) base Fmax = 2.7GHz on 28nm PLANAR HPP.

Porting that to 14nm LPP and keeping the same TDP could actually have almost 2x the Fmax.

 

[hrga225]

Athlon x845 is 3,5 GHz @ 65 w.
Porting it to 14FF you could have 5 ghz @ 100w.
The Stilt could make better guess as he has more info on Carrizo.

 

[coercitiv]

35W TDP Mobile Kaveri (A10-7600P) base Fmax = 2.7GHz on 28nm PLANAR HPP.

Porting that to 14nm LPP and keeping the same TDP could actually have almost 2x the Fmax.

Please, please stop with the relative frequency increases. You cannot just use some data for 1-2Ghz interval and extrapolate to 4-5Ghz, it's wrong on so many levels that it scares me you even entertained such an approach.

Based on your "calculations" a Sandy Bridge 2700K would have no problem fitting into a 25W TDP, while 15W TDP 4c/8t designs would be possible around 2.6Ghz base speed. This is not Sparta, it's just madness.

 

[AtenRa]

Based on your "calculations" a Sandy Bridge 2700K would have no problem fitting into a 25W TDP,

At 14nm ??? easily.

 

[Yuriman]

At 14nm ??? easily.

AtenRa, I'm not disagreeing with you, but giving a basis for comparison:

My i5 3570K (22nm) at 3.4ghz (non-turbo clock of 2600K) draws around 38w under an AVX load. At 3.6ghz, the 2600K's 4-core turbo speed, it draws ~44w. This is the CPU portion alone, and would leave very little thermal headroom for the GPU, but I could see the CPU downclocking a little under heavy GPU loads. Early Zen will not have an integrated GPU, though, so this is a moot point.

i7's draw more power than i5's, when fully loaded - perhaps 10-20%? I'm ballparking this number.

If you are targeting Sandy Bridge overall performance, by aiming for slightly lower clocks with higher IPC, it looks a lot more feasible. Skylake is in the range of 20-25% faster per clock than Sandy and would only need to be ~2.8ghz to have the same performance as a Sandy i7 @ 3.4-3.6. At 2.8ghz, my 22nm i5 draws only about 23w more under an AVX load than at idle. This number would be lower on 14nm.

25w is optimistic, but it doesn't seem unreasonable AMD could easily get to that performance level at <35w, possibly even <30w, without an iGPU inflating TDP.

 

[raghu78]

You are forgetting we are porting the same CPU design to 14nm LPP. If Kaveri can operate at 4GHz at 95W TDP on the 28nm Planar, it can certainly be clocked at 5GHz at lower TDP if manufactured at 14nm LPP.

Example,

At 14nm LPP you can have a 4GHz Kaveri at 35-45W TDP

OR

A 5GHz Kaveri at 65W TDP

OR

A 5.5GHz Kaveri at 95W TDP

sorry but you are really wrong. We do not have any idea of how the freq/power curve is for 14LPP vs 28SHP at 4+ Ghz frequencies. btw Kaveri uses a custom high performance CPU process 28SHP built specifically for Kaveri's 4+ Ghz freq requirements. On bleeding edge FINFET processes the biggest power efficiency reductions generally occur at lower frequencies (2-3 Ghz). I would say getting a 25-30% power reduction at 4+ Ghz freq is best case. btw getting to 5 Ghz is impossible without a custom high performance CPU process. The materials and transistors used are quite different when you are talking of 5 Ghz vs a process optimized for mobile where frequencies are in the 2 - 3 Ghz range. We do not know if 14LPP can even hit 4+ Ghz frequencies. Even if it can the transistors used will be different and the power efficiency gains will not be as high as you would get with the lower freq range.

 

[Yuriman]

Here is the frequency vs power draw curve for my 3570K, running at its minimum stable voltage. Intel's 14nm process is likely shifted a bit to the left of this. Can't speak for TSMC or GF.

 

[AtenRa]

AtenRa, I'm not disagreeing with you, but giving a basis for comparison:

My i5 3570K (22nm) at 3.4ghz (non-turbo clock of 2600K) draws around 38w under an AVX load. At 3.6ghz, the 2600K's 4-core turbo speed, it draws ~44w. This is the CPU portion alone, and would leave very little thermal headroom for the GPU, but I could see the CPU downclocking a little under heavy GPU loads. Early Zen will not have an integrated GPU, though, so this is a moot point.

i7's draw more power than i5's, when fully loaded - perhaps 10-20%? I'm ballparking this number.

If you are targeting Sandy Bridge overall performance, by aiming for slightly lower clocks with higher IPC, it looks a lot more feasible. Skylake is in the range of 20-25% faster per clock than Sandy and would only need to be ~2.8ghz to have the same performance as a Sandy i7 @ 3.4-3.6. At 2.8ghz, my 22nm i5 draws only about 23w more under an AVX load than at idle. This number would be lower on 14nm.

25w is optimistic, but it doesn't seem unreasonable AMD could easily get to that performance level at <35w, possibly even <30w, without an iGPU inflating TDP.

Dont compare SB AVX vs IV AVX. The two CPU designs are not the same, Ivy uses more power and it is faster than the SB in AVX load.

What im talking is porting the same design, for example porting SB 4+2 from 32nm to 14nm FF. This way the SB at 14nm could easily have the same performance at 25W TDP vs the 95W TDP at 32nm.

 

[ShintaiDK]

Dont compare SB AVX vs IV AVX. The two CPU designs are not the same, Ivy uses more power and it is faster than the SB in AVX load.

They use the same implementation. It was first changed in Haswell.

 

[AtenRa]

Ivy has two more AVX instructions

VCVTPH2PS and VCVTPS2PH

http://www.hotchips.org/wp-content/...r/HC24.28.117-HotChips_IvyBridge_Power_04.pdf

Page 34

 

[ShintaiDK]

Ivy has two more AVX instructions

VCVTPH2PS and VCVTPS2PH

http://www.hotchips.org/wp-content/...r/HC24.28.117-HotChips_IvyBridge_Power_04.pdf

Page 34

And? https://en.wikipedia.org/wiki/F16C

Not to mention your power and performance claim.

 

[AtenRa]

And AVX in SB and IV is not the same, not to mention the rest of the architecture.