Dresdenboy
Golden Member
Would there be any capacity constraints for mass market products, i.e. for the interposer, the HBM stacks, and the packaging?
Uh. I'm not sure power will be the problem in this scenario.
28nm 3.5 Ghz CPU XV only needs 65W.
Now a 14nm 3.5 to 4 Ghz CPU with Zen...would need no more than 35 to 45W for the CPU bit...maybe even less (APUs are 4-Cores.)
This means at LEAST 50W of Polaris + HBM goodness(1-2 Gb?).
Of course 960 might be a little high...but I feel like it will very well reach 750 Ti minimum...which would still shrek ANYTHING Intel has to offer at this point.
Of course CPU performance would still be below Intels current and last gen...but that hardly matters...because CPU and GPU performance would actually be VERY balanced out at this point.
I mean take XV, add 40% IPC (best case), run it at 3.5 to 4 Ghz...and throw in a Geforce 750 Ti?
Holy crap you got a winner.
I mean this is just theorycrafting...but if energy efficiency is any better than my guesstimated minimum of 50W for iGPU+Hbm...then even a GTX 960 would be possible, performance wise.
To me that sounds more interesting than their big chips with 16 threads.
IF this holds true I do wonder though...would HBM act as a general L4 cache or would it be used just for the iGPU.
I wonder what the latency is for HMC in comparison to ddr4 and HBM.
EDIT:
I wonder what the latency is for HMC in comparison to ddr4 and HBM.
Latency wise HBM is the worst, DDR4 middle and HMC the best. HMC is a very server/compute targeted memory. Also the only one of the 3 using a serial interface.
Now we would only need some indication that Zen APUs will actually use HBM(2), which IMO is extremely unlikely in consumer class products at least... Otherwise this is just more made up "news".
Latency wise HBM is the worst, DDR4 middle and HMC the best. HMC is a very server/compute targeted memory. Also the only one of the 3 using a serial interface.
Just... no.
HBM and DDR4 should have practically identical latency. HMC buffers all communication to pass it through that serial interface, meaning it should have slightly higher latency.
And what would that APU sell for? And why not use the extra cost for dual channel DDR4?
HBM also adds power consumption. Even a single stack may be +5W alone. Then add +W for whatever more the already throttle to hell nightmare APUs would need.
Well MS is trying to do that now with the Windows store and Windows store exclusive games. Personally, I think it is a very dangerous trend.
If they go to the expense of putting HBM2 on an APU, it will certainly have to be faster than a 750Ti. 750Ti is at the low end right now for 1080p gaming. It will be at least 1.5 to 2 years before we could expect to see a Zen/HBM apu. By that time, The new generation of dgpus will be on the market, and the bar for dgpu power consumption and performance will have been raised considerably.
In the desktop, I think they would need at least current GTX 950/960 level performance, along with good cpu performance to be anything more than a marginal low end solution like they are now. It can probably be done, but whether it can be done cost effectively remains to be seen. If they did bring out such an apu, it would also run the risk of cannibalizing their own low/mid range dgpu sales, so I think it would be priced relatively expensively.
Yes, in a special built apu for the consoles. But it hasnt transferred to the pc market. I would actually see this as an indication that HBM could suffer tbe same fate, rather than showing it is going to be widely adopted outside of dgpus and servers.